Struct Pstat 

#[repr(transparent)]
pub struct Pstat(pub u32);

Port Status. RDSTAT/WRSTAT depend on port type; change them through PIRULESTAT, not ordinary writes. Interrupt cause bits 8-14 are sticky write-one-to-clear, even with interrupts masked. Clearing INTERR also clears ERR0-ERR3. RPMC_FLASH_DEVICE may toggle for non-RPMC commands and must then be ignored.

Tuple Fields

0: u32

Implementations

impl Pstat

pub const fn rdstat(&self) -> u8

Host Read Data Status. Encodings: 0: Endpoint or index-and-data: Empty. Mailbox: Empty (host read to end). Master/Flash: No requests.; 1: Endpoint or index-and-data: Data waiting from MCU. Mailbox: Started (by MCU). Master/Flash: Started. From-host: goes to Pending next. To-host: goes to Complete next. SAF: host made request: Started.; 2: Mailbox: Complete (by MCU). Master/Flash: Complete. SAF: Complete.; 3: Mailbox: Partially read (by host). Master/Flash: From-host only, Pending (request made); goes to Complete next. SAF: MCU has setup completion.

pub const fn set_rdstat(&mut self, val: u8)

Host Read Data Status. Encodings: 0: Endpoint or index-and-data: Empty. Mailbox: Empty (host read to end). Master/Flash: No requests.; 1: Endpoint or index-and-data: Data waiting from MCU. Mailbox: Started (by MCU). Master/Flash: Started. From-host: goes to Pending next. To-host: goes to Complete next. SAF: host made request: Started.; 2: Mailbox: Complete (by MCU). Master/Flash: Complete. SAF: Complete.; 3: Mailbox: Partially read (by host). Master/Flash: From-host only, Pending (request made); goes to Complete next. SAF: MCU has setup completion.

pub const fn wrstat(&self) -> u8

Status of Host Writes. Encodings: 0: Endpoint: Empty. Index-and-data: Empty. Mailbox: Empty. Master/flash: Not last request.; 1: Endpoint: data waiting from host. Index-and-data: data waiting from host (index may have been written before). Mailbox: Started (by host). Master/flash: last request from-host/read-flash (writes to MCU). SAF: Request from master was or is Flash Read.; 2: Endpoint: Empty, but last was CMD. Index-and-data: wrote index. Mailbox: complete/last (host to end). Master/flash: last request to-host/write-flash (read from MCU). SAF: Request from Master was or is Flash Write.; 3: Endpoint: CMD waiting from host. Index-and-data: Wrote Data then Index. Mailbox: Partially read (by MCU). Flash: Last Requested Erase. SAF: Request from Master was or is Flash Erase.

pub const fn set_wrstat(&mut self, val: u8)

Status of Host Writes. Encodings: 0: Endpoint: Empty. Index-and-data: Empty. Mailbox: Empty. Master/flash: Not last request.; 1: Endpoint: data waiting from host. Index-and-data: data waiting from host (index may have been written before). Mailbox: Started (by host). Master/flash: last request from-host/read-flash (writes to MCU). SAF: Request from master was or is Flash Read.; 2: Endpoint: Empty, but last was CMD. Index-and-data: wrote index. Mailbox: complete/last (host to end). Master/flash: last request to-host/write-flash (read from MCU). SAF: Request from Master was or is Flash Write.; 3: Endpoint: CMD waiting from host. Index-and-data: Wrote Data then Index. Mailbox: Partially read (by MCU). Flash: Last Requested Erase. SAF: Request from Master was or is Flash Erase.

pub const fn interr(&self) -> bool

Interrupt Caused by Error

pub const fn set_interr(&mut self, val: bool)

Interrupt Caused by Error

pub const fn intrd(&self) -> bool

Interrupt Caused by Read

pub const fn set_intrd(&mut self, val: bool)

Interrupt Caused by Read

pub const fn intwr(&self) -> bool

Interrupt Caused by Write

pub const fn set_intwr(&mut self, val: bool)

Interrupt Caused by Write

pub const fn intspc0(&self) -> bool

SPC0 Interrupt

pub const fn set_intspc0(&mut self, val: bool)

SPC0 Interrupt

pub const fn intspc1(&self) -> bool

SPC1 Interrupt

pub const fn set_intspc1(&mut self, val: bool)

SPC1 Interrupt

pub const fn intspc2(&self) -> bool

SPC2 Interrupt

pub const fn set_intspc2(&mut self, val: bool)

SPC2 Interrupt

pub const fn instspc3(&self) -> bool

SPC3 Interrupt

pub const fn set_instspc3(&mut self, val: bool)

SPC3 Interrupt

pub const fn err0(&self) -> bool

Error 0

pub const fn set_err0(&mut self, val: bool)

Error 0

pub const fn err1(&self) -> bool

Error 1

pub const fn set_err1(&mut self, val: bool)

Error 1

pub const fn err2(&self) -> bool

Error 2

pub const fn set_err2(&mut self, val: bool)

Error 2

pub const fn err3(&self) -> bool

Error 3

pub const fn set_err3(&mut self, val: bool)

Error 3

pub const fn rpmc_1_or_2(&self) -> bool

RPMC 1 or 2. Encodings: 0: RPMC operation 1 has been chosen; 1: RPMC operation 2 has been chosen

pub const fn set_rpmc_1_or_2(&mut self, val: bool)

RPMC 1 or 2. Encodings: 0: RPMC operation 1 has been chosen; 1: RPMC operation 2 has been chosen

pub const fn rpmc_flash_device(&self) -> u8

RPMC Flash Device. Encodings: 0: First device; 1: Second device; 2: Third device; 3: Fourth device

pub const fn set_rpmc_flash_device(&mut self, val: u8)

RPMC Flash Device. Encodings: 0: First device; 1: Second device; 2: Third device; 3: Fourth device

Trait Implementations

impl Clone for Pstat

fn clone(&self) -> Pstat

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Pstat

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Pstat

fn default() -> Pstat

Returns the “default value” for a type.

impl PartialEq for Pstat

fn eq(&self, other: &Pstat) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Pstat

impl Eq for Pstat

impl StructuralPartialEq for Pstat