Struct Clkctl1 

pub struct Clkctl1 { /* private fields */ }

clock ccontroller 1.

Implementations

impl Clkctl1

pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

pub const fn as_ptr(&self) -> *mut ()

pub const fn pscctl0(self) -> Reg<Pscctl0, RW>

clock control register 0.

pub const fn pscctl1(self) -> Reg<Pscctl1, RW>

clock control register 1.

pub const fn pscctl2(self) -> Reg<Pscctl2, RW>

clock control register 2.

pub const fn pscctl0_set(self) -> Reg<Pscctl0Set, W>

clock set register 0.

pub const fn pscctl1_set(self) -> Reg<Pscctl1Set, W>

clock set register 1.

pub const fn pscctl2_set(self) -> Reg<Pscctl2Set, W>

clock set register 2.

pub const fn pscctl0_clr(self) -> Reg<Pscctl0Clr, W>

clock clear register 0.

pub const fn pscctl1_clr(self) -> Reg<Pscctl1Clr, W>

clock clear register 1.

pub const fn pscctl2_clr(self) -> Reg<Pscctl2Clr, W>

clock clear register 2.

pub const fn audiopll0clksel(self) -> Reg<Audiopll0clksel, RW>

audio pll0 clock selection.

pub const fn audiopll0ctl0(self) -> Reg<Audiopll0ctl0, RW>

audio pll0 control0.

pub const fn audiopll0locktimediv2(self) -> Reg<Audiopll0locktimediv2, RW>

audio pll0 lock time.

pub const fn audiopll0num(self) -> Reg<Audiopll0num, RW>

audio pll0 number.

pub const fn audiopll0denom(self) -> Reg<Audiopll0denom, RW>

Audio pll0 denom.

pub const fn audiopll0pfd(self) -> Reg<Audiopll0pfd, RW>

audio pll0 PFD.

pub const fn audiopllclkdiv(self) -> Reg<Audiopllclkdiv, RW>

audio pll0 clock divider.

pub const fn dspcpuclkdiv(self) -> Reg<Dspcpuclkdiv, RW>

DSP cpu clock divider.

pub const fn dspmainramclkdiv(self) -> Reg<Dspmainramclkdiv, RW>

DSP main ram clock divider.

pub const fn dspcpuclksela(self) -> Reg<Dspcpuclksela, RW>

DSP clock selection A.

pub const fn dspcpuclkselb(self) -> Reg<Dspcpuclkselb, RW>

DSP clock selection B.

pub const fn oseventfclksel(self) -> Reg<Oseventfclksel, RW>

OS EVENT clock selection.

pub const fn flexcomm(self, n: usize) -> Flexcomm

flexcomm clock controller.

pub const fn frg14clksel(self) -> Reg<Frg14clksel, RW>

FRG clock selection register 14.

pub const fn frg14ctl(self) -> Reg<Frg14ctl, RW>

FRG clock controller 14.

pub const fn fc14fclksel(self) -> Reg<Fc14fclksel, RW>

flexcomm14 clock selection.

pub const fn frg15clksel(self) -> Reg<Frg15clksel, RW>

FRG clock selection register 15.

pub const fn frg15ctl(self) -> Reg<Frg15ctl, RW>

FRG clock controller 15.

pub const fn fc15fclksel(self) -> Reg<Fc15fclksel, RW>

flexcomm15 clock selection.

pub const fn frgpllclkdiv(self) -> Reg<Frgpllclkdiv, RW>

FRG pll clock divider.

pub const fn dmic0fclksel(self) -> Reg<Dmic0fclksel, RW>

DMIC0 clk selection.

pub const fn dmic0fclkdiv(self) -> Reg<Dmic0fclkdiv, RW>

DMIC clock clock divider.

pub const fn ct32bitfclksel(self, n: usize) -> Reg<Ct32bitfclksel, RW>

ct32bit timer N clock selection.

pub const fn audiomclksel(self) -> Reg<Audiomclksel, RW>

audio mclock selection.

pub const fn audiomclkdiv(self) -> Reg<Audiomclkdiv, RW>

audio mclock divider.

pub const fn clkoutsel0(self) -> Reg<Clkoutsel0, RW>

clock out selection 0.

pub const fn clkoutsel1(self) -> Reg<Clkoutsel1, RW>

clock out selection 1.

pub const fn clkoutdiv(self) -> Reg<Clkoutdiv, RW>

clock_out divider.

pub const fn i3c0fclksel(self) -> Reg<I3c0fclksel, RW>

I3C0 fclk selection.

pub const fn i3c0fclkstcsel(self) -> Reg<I3c0fclkstcsel, RW>

I3C0 fclk STC selection.

pub const fn i3c0fclkstcdiv(self) -> Reg<I3c0fclkstcdiv, RW>

I3C0 fclk STC divider.

pub const fn i3c0fclksdiv(self) -> Reg<I3c0fclksdiv, RW>

I3C0 fclks divider.

pub const fn i3c0fclkdiv(self) -> Reg<I3c0fclkdiv, RW>

I3C0 fclk divider.

pub const fn wdt1fclksel(self) -> Reg<Wdt1fclksel, RW>

WDT1 clock selection.

pub const fn acmp0fclksel(self) -> Reg<Acmp0fclksel, RW>

acomparator 0 clock selection.

pub const fn acmp0fclkdiv(self) -> Reg<Acmp0fclkdiv, RW>

acomparator 0 fclk divider.

Trait Implementations

impl Clone for Clkctl1

fn clone(&self) -> Clkctl1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Clkctl1

fn eq(&self, other: &Clkctl1) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Clkctl1

impl Eq for Clkctl1

impl Send for Clkctl1

impl StructuralPartialEq for Clkctl1

impl Sync for Clkctl1