Struct ComplementaryPwm 

pub struct ComplementaryPwm<'d, T: AdvancedInstance4Channel> { /* private fields */ }

PWM driver with support for standard and complementary outputs.

Implementations

impl<'d, T: AdvancedInstance4Channel> ComplementaryPwm<'d, T>

pub fn new( tim: Peri<'d, T>, ch1: Option<PwmPin<'d, T, Ch1>>, ch1n: Option<ComplementaryPwmPin<'d, T, Ch1>>, ch2: Option<PwmPin<'d, T, Ch2>>, ch2n: Option<ComplementaryPwmPin<'d, T, Ch2>>, ch3: Option<PwmPin<'d, T, Ch3>>, ch3n: Option<ComplementaryPwmPin<'d, T, Ch3>>, ch4: Option<PwmPin<'d, T, Ch4>>, ch4n: Option<ComplementaryPwmPin<'d, T, Ch4>>, freq: Hertz, counting_mode: CountingMode, ) -> Self

Create a new complementary PWM driver.

pub fn set_output_idle_state( &mut self, channels: &[Channel], polarity: IdlePolarity, )

Sets the idle output state for the given channels.

pub fn set_normal_output_idle_state( &mut self, channels: &[Channel], ois_active: bool, )

Sets the idle state for the normal (OISx) channels only. OISxN is not modified.

When OSSI is enabled (set_off_state_selection_idle(Ossi::IdleLevel)), the timer drives outputs to the configured idle state whenever MOE=0, regardless of GPIO push-pull configuration. This makes idle behavior deterministic across platforms.

Constraint: OISx and OISxN must not both map to the active output state for the same channel. After a break event the timer inserts a dead time before settling outputs to their idle state, and the hardware prevents both complementary outputs from being active simultaneously to avoid a shoot-through condition in half-bridge configurations.

• ois_active = true: normal outputs go active when idle (OISx=1)
• ois_active = false: normal outputs go inactive when idle (OISx=0)

pub fn set_complementary_output_idle_state( &mut self, channels: &[Channel], oisn_active: bool, )

Sets the idle state for the complementary (OISxN) channels only. OISx is not modified.

When OSSI is enabled (set_off_state_selection_idle(Ossi::IdleLevel)), the timer drives outputs to the configured idle state whenever MOE=0, regardless of GPIO push-pull configuration. This makes idle behavior deterministic across platforms.

Constraint: OISx and OISxN must not both map to the active output state for the same channel. See [set_normal_output_idle_state] for details.

• oisn_active = true: complementary outputs go active when idle (OISxN=1)
• oisn_active = false: complementary outputs go inactive when idle (OISxN=0)

pub fn set_off_state_selection_idle(&mut self, val: Ossi)

Set state of OSSI-bit in BDTR register

pub fn get_off_state_selection_idle(&self) -> Ossi

Get state of OSSI-bit in BDTR register

pub fn set_off_state_selection_run(&mut self, val: Ossr)

Set state of OSSR-bit in BDTR register

pub fn get_off_state_selection_run(&self) -> Ossr

Get state of OSSR-bit in BDTR register

pub fn trigger_software_break(&mut self, n: usize)

Trigger break input from software

pub fn set_master_output_enable(&mut self, enable: bool)

Set Master Output Enable

pub fn get_master_output_enable(&self) -> bool

Get Master Output Enable

pub fn set_break_enable(&mut self, enable: bool)

Enable/disable break input 1.

When enabled, an active level on the break input forces all timer outputs to their safe state (configured by OSSI/OSSR and OIS/OISN). This provides hardware-level overcurrent protection for motor drives.

pub fn get_break_enable(&self) -> bool

Get break input 1 enable state.

pub fn set_break_polarity(&mut self, polarity: BreakInputPolarity)

Set break input 1 polarity.

pub fn get_break_polarity(&self) -> BreakInputPolarity

Get break input 1 polarity.

pub fn set_break_filter(&mut self, filter: FilterValue)

Set break input 1 digital filter.

The filter rejects glitches shorter than the configured number of clock cycles, preventing false break events from noise on the pin.

pub fn get_break_filter(&self) -> FilterValue

Get break input 1 digital filter.

pub fn set_break2_enable(&mut self, enable: bool)

Enable/disable break input 2.

pub fn get_break2_enable(&self) -> bool

Get break input 2 enable state.

pub fn set_break2_polarity(&mut self, polarity: BreakInputPolarity)

Set break input 2 polarity.

pub fn get_break2_polarity(&self) -> BreakInputPolarity

Get break input 2 polarity.

pub fn set_break2_filter(&mut self, filter: FilterValue)

Set break input 2 digital filter.

pub fn get_break2_filter(&self) -> FilterValue

Get break input 2 digital filter.

pub fn set_automatic_output_enable(&mut self, enable: bool)

Enable/disable automatic output enable (AOE).

When enabled, the MOE bit is automatically set at the next update event after a break event, allowing the outputs to resume. When disabled, MOE can only be re-enabled by software after a break.

pub fn get_automatic_output_enable(&self) -> bool

Get automatic output enable (AOE) state.

pub fn set_break_comparator_enable(&mut self, comp_index: usize, enable: bool)

Enable/disable comparator output as break input 1 source.

Routes the internal comparator output directly to the break input, no GPIO pin needed. comp_index is 0-based (0=COMP1, 1=COMP2, etc.). Multiple comparators can be enabled simultaneously (OR’d together).

pub fn get_break_comparator_enable(&self, comp_index: usize) -> bool

Get comparator break input 1 enable state.

pub fn set_break_comparator_polarity( &mut self, comp_index: usize, polarity: BreakComparatorPolarity, )

Set comparator break input 1 polarity.

pub fn get_break_comparator_polarity( &self, comp_index: usize, ) -> BreakComparatorPolarity

Get comparator break input 1 polarity.

pub fn set_break_input_pin_enable(&mut self, enable: bool)

Enable/disable the external BKIN pin as break input 1 source.

pub fn get_break_input_pin_enable(&self) -> bool

Get external BKIN pin enable state.

pub fn set_break2_comparator_enable(&mut self, comp_index: usize, enable: bool)

Enable/disable comparator output as break input 2 source.

pub fn get_break2_comparator_enable(&self, comp_index: usize) -> bool

Get comparator break input 2 enable state.

pub fn set_break2_comparator_polarity( &mut self, comp_index: usize, polarity: BreakComparatorPolarity, )

Set comparator break input 2 polarity.

pub fn get_break2_comparator_polarity( &self, comp_index: usize, ) -> BreakComparatorPolarity

Get comparator break input 2 polarity.

pub fn set_break2_input_pin_enable(&mut self, enable: bool)

Enable/disable the external BK2IN pin as break input 2 source.

pub fn get_break2_input_pin_enable(&self) -> bool

Get external BK2IN pin enable state.

pub fn set_mms2(&mut self, mms2: Mms2)

Set Master Slave Mode 2

pub fn set_repetition_counter(&mut self, val: u16)

Set Repetition Counter

pub fn enable(&mut self, channel: Channel)

Enable the given channel.

pub fn disable(&mut self, channel: Channel)

Disable the given channel.

pub fn set_frequency(&mut self, freq: Hertz)

Set PWM frequency.

The actual frequency may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.

Note: that the frequency will not be applied in the timer until an update event occurs.

pub fn set_period_ms(&mut self, ms: u32)

Set the PWM period in milliseconds.

The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.

Note: that the period will not be applied in the timer until an update event occurs.

pub fn set_period_us(&mut self, us: u32)

Set the PWM period in microseconds.

The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.

Note: that the period will not be applied in the timer until an update event occurs.

pub fn set_period_secs(&mut self, secs: u32)

Set the PWM period in seconds.

The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.

Note: that the period will not be applied in the timer until an update event occurs.

pub fn set_period(&mut self, period: Duration)

Set the PWM period using an embassy_time::Duration.

The actual period may differ from the requested value due to hardware limitations. The timer will round towards a slower (longer) period.

Note: that the period will not be applied in the timer until an update event occurs.

pub fn get_max_duty(&self) -> u32

Get max duty value.

This value depends on the configured frequency and the timer’s clock rate from RCC.

pub fn set_duty(&mut self, channel: Channel, duty: u32)

Set the duty for a given channel.

The value ranges from 0 for 0% duty, to get_max_duty for 100% duty, both included.

pub fn set_output_compare_clear_enable( &mut self, channel: Channel, enable: bool, )

Enable/disable OCREF clear for a given channel.

pub fn set_polarity(&mut self, channel: Channel, polarity: OutputPolarity)

Set the output polarity for a given channel.

pub fn set_main_polarity(&mut self, channel: Channel, polarity: OutputPolarity)

Set the main output polarity for a given channel.

pub fn set_complementary_polarity( &mut self, channel: Channel, polarity: OutputPolarity, )

Set the complementary output polarity for a given channel.

pub fn set_dead_time(&mut self, value: u16)

Set the dead time as a proportion of max_duty

Trait Implementations

impl<'d, T: AdvancedInstance4Channel> Pwm for ComplementaryPwm<'d, T>

type Channel = Channel

Enumeration of channels that can be used with this Pwm interface

type Time = Hertz

A time unit that can be converted into a human time unit (e.g. seconds)

type Duty = u16

Type for the duty methods

fn disable(&mut self, channel: Self::Channel)

Disables a PWM channel

fn enable(&mut self, channel: Self::Channel)

Enables a PWM channel

fn get_period(&self) -> Self::Time

Returns the current PWM period

fn get_duty(&self, channel: Self::Channel) -> Self::Duty

Returns the current duty cycle

fn get_max_duty(&self) -> Self::Duty

Returns the maximum duty cycle value

fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty)

Sets a new duty cycle

fn set_period<P>(&mut self, period: P)

where P: Into<Self::Time>,

Sets a new PWM period