Enum Interrupt 

pub enum Interrupt {
    WWDG = 0,
    PWR_PVD = 1,
    RTC = 2,
    TAMP = 3,
    RAMCFG = 4,
    FLASH = 5,
    RCC = 6,
    EXTI0 = 7,
    EXTI1 = 8,
    EXTI2 = 9,
    EXTI3 = 10,
    EXTI4 = 11,
    EXTI5 = 12,
    EXTI6 = 13,
    EXTI7 = 14,
    EXTI8 = 15,
    EXTI9 = 16,
    EXTI10 = 17,
    EXTI11 = 18,
    EXTI12 = 19,
    EXTI13 = 20,
    EXTI14 = 21,
    EXTI15 = 22,
    LPDMA1_CH0 = 23,
    LPDMA1_CH1 = 24,
    LPDMA1_CH2 = 25,
    LPDMA1_CH3 = 26,
    LPDMA1_CH4 = 27,
    LPDMA1_CH5 = 28,
    LPDMA1_CH6 = 29,
    LPDMA1_CH7 = 30,
    IWDG = 31,
    ADC1 = 32,
    ADC2 = 33,
    FDCAN1_IT0 = 34,
    FDCAN1_IT1 = 35,
    TIM1_BRK = 36,
    TIM1_UP = 37,
    TIM1_TRG_COM = 38,
    TIM1_CC = 39,
    TIM2 = 40,
    TIM5 = 41,
    TIM6 = 42,
    TIM7 = 43,
    I2C1_EV = 44,
    I2C1_ERR = 45,
    I3C1_EV = 46,
    I3C1_ERR = 47,
    SPI1 = 48,
    SPI2 = 49,
    SPI3 = 50,
    USART1 = 51,
    USART2 = 52,
    USART3 = 53,
    UART4 = 54,
    UART5 = 55,
    LPUART1 = 56,
    LPTIM1 = 57,
    TIM12 = 58,
    TIM15 = 59,
    TIM16 = 60,
    TIM17 = 61,
    USB_DRD_FS = 62,
    CRS = 63,
    RNG = 64,
    FPU = 65,
    ICACHE = 66,
    CORDIC = 67,
    HASH = 69,
    I2C2_EV = 70,
    I2C2_ERR = 71,
    TIM8_BRK = 72,
    TIM8_UP = 73,
    TIM8_TRG_COM = 74,
    TIM8_CC = 75,
    COMP1 = 76,
    DAC1 = 77,
    LPDMA2_CH0 = 78,
    LPDMA2_CH1 = 79,
    LPDMA2_CH2 = 80,
    LPDMA2_CH3 = 81,
    LPDMA2_CH4 = 82,
    LPDMA2_CH5 = 83,
    LPDMA2_CH6 = 84,
    LPDMA2_CH7 = 85,
    FDCAN2_IT0 = 86,
    FDCAN2_IT1 = 87,
    TIM3 = 89,
    TIM4 = 90,
    XSPI1 = 91,
    PKA = 93,
    ETH1 = 94,
    ETH1_WKUP = 95,
    USART6 = 96,
    UART7 = 97,
    ADC3 = 98,
}

Variants

WWDG = 0

0 - WWDG

PWR_PVD = 1

1 - PWR_PVD

RTC = 2

2 - RTC

TAMP = 3

3 - TAMP

RAMCFG = 4

4 - RAMCFG

FLASH = 5

5 - FLASH

RCC = 6

6 - RCC

EXTI0 = 7

7 - EXTI0

EXTI1 = 8

8 - EXTI1

EXTI2 = 9

9 - EXTI2

EXTI3 = 10

10 - EXTI3

EXTI4 = 11

11 - EXTI4

EXTI5 = 12

12 - EXTI5

EXTI6 = 13

13 - EXTI6

EXTI7 = 14

14 - EXTI7

EXTI8 = 15

15 - EXTI8

EXTI9 = 16

16 - EXTI9

EXTI10 = 17

17 - EXTI10

EXTI11 = 18

18 - EXTI11

EXTI12 = 19

19 - EXTI12

EXTI13 = 20

20 - EXTI13

EXTI14 = 21

21 - EXTI14

EXTI15 = 22

22 - EXTI15

LPDMA1_CH0 = 23

23 - LPDMA1_CH0

LPDMA1_CH1 = 24

24 - LPDMA1_CH1

LPDMA1_CH2 = 25

25 - LPDMA1_CH2

LPDMA1_CH3 = 26

26 - LPDMA1_CH3

LPDMA1_CH4 = 27

27 - LPDMA1_CH4

LPDMA1_CH5 = 28

28 - LPDMA1_CH5

LPDMA1_CH6 = 29

29 - LPDMA1_CH6

LPDMA1_CH7 = 30

30 - LPDMA1_CH7

IWDG = 31

31 - IWDG

ADC1 = 32

32 - ADC1

ADC2 = 33

33 - ADC2

FDCAN1_IT0 = 34

34 - FDCAN1_IT0

FDCAN1_IT1 = 35

35 - FDCAN1_IT1

TIM1_BRK = 36

36 - TIM1_BRK

TIM1_UP = 37

37 - TIM1_UP

TIM1_TRG_COM = 38

38 - TIM1_TRG_COM

TIM1_CC = 39

39 - TIM1_CC

TIM2 = 40

40 - TIM2

TIM5 = 41

41 - TIM5

TIM6 = 42

42 - TIM6

TIM7 = 43

43 - TIM7

I2C1_EV = 44

44 - I2C1_EV

I2C1_ERR = 45

45 - I2C1_ERR

I3C1_EV = 46

46 - I3C1_EV

I3C1_ERR = 47

47 - I3C1_ERR

SPI1 = 48

48 - SPI1

SPI2 = 49

49 - SPI2

SPI3 = 50

50 - SPI3

USART1 = 51

51 - USART1

USART2 = 52

52 - USART2

USART3 = 53

53 - USART3

UART4 = 54

54 - UART4

UART5 = 55

55 - UART5

LPUART1 = 56

56 - LPUART1

LPTIM1 = 57

57 - LPTIM1

TIM12 = 58

58 - TIM12

TIM15 = 59

59 - TIM15

TIM16 = 60

60 - TIM16

TIM17 = 61

61 - TIM17

USB_DRD_FS = 62

62 - USB_DRD_FS

CRS = 63

63 - CRS

RNG = 64

64 - RNG

FPU = 65

65 - FPU

ICACHE = 66

66 - ICACHE

CORDIC = 67

67 - CORDIC

HASH = 69

69 - HASH

I2C2_EV = 70

70 - I2C2_EV

I2C2_ERR = 71

71 - I2C2_ERR

TIM8_BRK = 72

72 - TIM8_BRK

TIM8_UP = 73

73 - TIM8_UP

TIM8_TRG_COM = 74

74 - TIM8_TRG_COM

TIM8_CC = 75

75 - TIM8_CC

COMP1 = 76

76 - COMP1

DAC1 = 77

77 - DAC1

LPDMA2_CH0 = 78

78 - LPDMA2_CH0

LPDMA2_CH1 = 79

79 - LPDMA2_CH1

LPDMA2_CH2 = 80

80 - LPDMA2_CH2

LPDMA2_CH3 = 81

81 - LPDMA2_CH3

LPDMA2_CH4 = 82

82 - LPDMA2_CH4

LPDMA2_CH5 = 83

83 - LPDMA2_CH5

LPDMA2_CH6 = 84

84 - LPDMA2_CH6

LPDMA2_CH7 = 85

85 - LPDMA2_CH7

FDCAN2_IT0 = 86

86 - FDCAN2_IT0

FDCAN2_IT1 = 87

87 - FDCAN2_IT1

TIM3 = 89

89 - TIM3

TIM4 = 90

90 - TIM4

XSPI1 = 91

91 - XSPI1

PKA = 93

93 - PKA

ETH1 = 94

94 - ETH1

ETH1_WKUP = 95

95 - ETH1_WKUP

USART6 = 96

96 - USART6

UART7 = 97

97 - UART7

ADC3 = 98

98 - ADC3

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl Format for Interrupt

fn format(&self, f: Formatter<'_>)

Writes the defmt representation of self to fmt.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt