Struct embassy_stm32::dac::DacChannel

pub struct DacChannel<'d, T: Instance, const N: u8, DMA = NoDma> { /* private fields */ }

Driver for a single DAC channel.

If you want to use both channels, either together or independently, create a Dac first and use it to access each channel.

Implementations

impl<'d, T: Instance, const N: u8, DMA> DacChannel<'d, T, N, DMA>

pub fn new( _peri: impl Peripheral<P = T> + 'd, dma: impl Peripheral<P = DMA> + 'd, pin: impl Peripheral<P = impl DacPin<T, N> + Pin> + 'd ) -> Self

Create a new DacChannel instance, consuming the underlying DAC peripheral.

If you’re not using DMA, pass [dma::NoDma] for the dma argument.

The channel is enabled on creation and begins to drive the output pin. Note that some methods, such as set_trigger() and set_mode(), will disable the channel; you must re-enable it with enable().

By default, triggering is disabled, but it can be enabled using DacChannel::set_trigger().

pub fn set_enable(&mut self, on: bool)

Enable or disable this channel.

pub fn enable(&mut self)

Enable this channel.

pub fn disable(&mut self)

Disable this channel.

pub fn set_trigger(&mut self, source: TriggerSel)

Set the trigger source for this channel.

This method disables the channel, so you may need to re-enable afterwards.

pub fn set_triggering(&mut self, on: bool)

Enable or disable triggering for this channel.

pub fn trigger(&mut self)

Software trigger this channel.

pub fn set(&mut self, value: Value)

Write a new value to this channel.

If triggering is not enabled, the new value is immediately output; otherwise, it will be output after the next trigger.

pub fn read(&self) -> u16

Read the current output value of the DAC.

impl<'d, T: Instance, DMA> DacChannel<'d, T, 1, DMA>

where DMA: DacDma1<T>,

pub async fn write(&mut self, data: ValueArray<'_>, circular: bool)

Write data to this channel via DMA.

To prevent delays or glitches when outputing a periodic waveform, the circular flag can be set. This configures a circular DMA transfer that continually outputs data. Note that for performance reasons in circular mode the transfer-complete interrupt is disabled.

impl<'d, T: Instance, DMA> DacChannel<'d, T, 2, DMA>

where DMA: DacDma2<T>,

pub async fn write(&mut self, data: ValueArray<'_>, circular: bool)

Write data to this channel via DMA.

To prevent delays or glitches when outputing a periodic waveform, the circular flag can be set. This configures a circular DMA transfer that continually outputs data. Note that for performance reasons in circular mode the transfer-complete interrupt is disabled.

Trait Implementations

impl<'d, T: Instance, const N: u8, DMA> Drop for DacChannel<'d, T, N, DMA>

fn drop(&mut self)

Executes the destructor for this type.