Enum Tim2sw
#[repr(u8)]pub enum Tim2sw {
PCLK1_TIM = 0,
PLL1_P_MUL_2 = 1,
}
Variants§
PCLK1_TIM = 0
PCLK2 clock (doubled frequency when prescaled)
PLL1_P_MUL_2 = 1
PLL vco output (running up to 144 MHz)
Implementations§
Trait Implementations§
§impl Ord for Tim2sw
impl Ord for Tim2sw
§impl PartialOrd for Tim2sw
impl PartialOrd for Tim2sw
impl Copy for Tim2sw
impl Eq for Tim2sw
impl StructuralPartialEq for Tim2sw
Auto Trait Implementations§
impl Freeze for Tim2sw
impl RefUnwindSafe for Tim2sw
impl Send for Tim2sw
impl Sync for Tim2sw
impl Unpin for Tim2sw
impl UnwindSafe for Tim2sw
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more