Enum Timsw
#[repr(u8)]pub enum Timsw {
PCLK2_TIM = 0,
PLL1_P_MUL_2 = 1,
}
Variants§
PCLK2_TIM = 0
PCLK2 clock (doubled frequency when prescaled)
PLL1_P_MUL_2 = 1
PLL vco output (running up to 144 MHz)
Implementations§
Trait Implementations§
§impl Ord for Timsw
impl Ord for Timsw
§impl PartialOrd for Timsw
impl PartialOrd for Timsw
impl Copy for Timsw
impl Eq for Timsw
impl StructuralPartialEq for Timsw
Auto Trait Implementations§
impl Freeze for Timsw
impl RefUnwindSafe for Timsw
impl Send for Timsw
impl Sync for Timsw
impl Unpin for Timsw
impl UnwindSafe for Timsw
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more
Source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
Source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
🔬This is a nightly-only experimental API. (
clone_to_uninit
)