embassy-stm32

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embassy_stm32

Struct Peripherals

Source
pub struct Peripherals {
Show 146 fields pub ADC1: ADC1, pub ADC1_COMMON: ADC1_COMMON, pub AES: AES, pub CEC: CEC, pub COMP1: COMP1, pub COMP2: COMP2, pub CRC: CRC, pub DAC1: DAC1, pub DBGMCU: DBGMCU, pub DMA1: DMA1, pub DMAMUX1: DMAMUX1, pub FLASH: FLASH, pub PA0: PA0, pub PA1: PA1, pub PA2: PA2, pub PA3: PA3, pub PA4: PA4, pub PA5: PA5, pub PA6: PA6, pub PA7: PA7, pub PA8: PA8, pub PA9: PA9, pub PA10: PA10, pub PA11: PA11, pub PA12: PA12, pub PA13: PA13, pub PA14: PA14, pub PA15: PA15, pub PB0: PB0, pub PB1: PB1, pub PB2: PB2, pub PB3: PB3, pub PB4: PB4, pub PB5: PB5, pub PB6: PB6, pub PB7: PB7, pub PB8: PB8, pub PB9: PB9, pub PB10: PB10, pub PB11: PB11, pub PB12: PB12, pub PB13: PB13, pub PB14: PB14, pub PB15: PB15, pub PC0: PC0, pub PC1: PC1, pub PC2: PC2, pub PC3: PC3, pub PC4: PC4, pub PC5: PC5, pub PC6: PC6, pub PC7: PC7, pub PC8: PC8, pub PC9: PC9, pub PC10: PC10, pub PC11: PC11, pub PC12: PC12, pub PC13: PC13, pub PC14: PC14, pub PC15: PC15, pub PD0: PD0, pub PD1: PD1, pub PD2: PD2, pub PD3: PD3, pub PD4: PD4, pub PD5: PD5, pub PD6: PD6, pub PD7: PD7, pub PD8: PD8, pub PD9: PD9, pub PD10: PD10, pub PD11: PD11, pub PD12: PD12, pub PD13: PD13, pub PD14: PD14, pub PD15: PD15, pub PF0: PF0, pub PF1: PF1, pub PF2: PF2, pub PF3: PF3, pub PF4: PF4, pub PF5: PF5, pub PF6: PF6, pub PF7: PF7, pub PF8: PF8, pub PF9: PF9, pub PF10: PF10, pub PF11: PF11, pub PF12: PF12, pub PF13: PF13, pub PF14: PF14, pub PF15: PF15, pub I2C1: I2C1, pub I2C2: I2C2, pub IWDG: IWDG, pub LPTIM1: LPTIM1, pub LPTIM2: LPTIM2, pub LPUART1: LPUART1, pub PWR: PWR, pub MCO1: MCO1, pub RCC: RCC, pub RNG: RNG, pub RTC: RTC, pub SPI1: SPI1, pub SPI2: SPI2, pub SYSCFG: SYSCFG, pub TAMP: TAMP, pub TIM1: TIM1, pub TIM14: TIM14, pub TIM16: TIM16, pub TIM17: TIM17, pub TIM2: TIM2, pub TIM3: TIM3, pub TIM6: TIM6, pub TIM7: TIM7, pub UCPD1: UCPD1, pub UCPD2: UCPD2, pub UID: UID, pub USART1: USART1, pub USART2: USART2, pub USART3: USART3, pub USART4: USART4, pub WWDG: WWDG, pub EXTI0: EXTI0, pub EXTI1: EXTI1, pub EXTI2: EXTI2, pub EXTI3: EXTI3, pub EXTI4: EXTI4, pub EXTI5: EXTI5, pub EXTI6: EXTI6, pub EXTI7: EXTI7, pub EXTI8: EXTI8, pub EXTI9: EXTI9, pub EXTI10: EXTI10, pub EXTI11: EXTI11, pub EXTI12: EXTI12, pub EXTI13: EXTI13, pub EXTI14: EXTI14, pub EXTI15: EXTI15, pub DMA1_CH1: DMA1_CH1, pub DMA1_CH2: DMA1_CH2, pub DMA1_CH3: DMA1_CH3, pub DMA1_CH4: DMA1_CH4, pub DMA1_CH5: DMA1_CH5, pub DMA1_CH6: DMA1_CH6, pub DMA1_CH7: DMA1_CH7,
}
Expand description

Struct containing all the peripheral singletons.

To obtain the peripherals, you must initialize the HAL, by calling crate::init.

Fields§

§ADC1: ADC1

ADC1 peripheral

§ADC1_COMMON: ADC1_COMMON

ADC1_COMMON peripheral

§AES: AES

AES peripheral

§CEC: CEC

CEC peripheral

§COMP1: COMP1

COMP1 peripheral

§COMP2: COMP2

COMP2 peripheral

§CRC: CRC

CRC peripheral

§DAC1: DAC1

DAC1 peripheral

§DBGMCU: DBGMCU

DBGMCU peripheral

§DMA1: DMA1

DMA1 peripheral

§DMAMUX1: DMAMUX1

DMAMUX1 peripheral

§FLASH: FLASH

FLASH peripheral

§PA0: PA0

PA0 peripheral

§PA1: PA1

PA1 peripheral

§PA2: PA2

PA2 peripheral

§PA3: PA3

PA3 peripheral

§PA4: PA4

PA4 peripheral

§PA5: PA5

PA5 peripheral

§PA6: PA6

PA6 peripheral

§PA7: PA7

PA7 peripheral

§PA8: PA8

PA8 peripheral

§PA9: PA9

PA9 peripheral

§PA10: PA10

PA10 peripheral

§PA11: PA11

PA11 peripheral

§PA12: PA12

PA12 peripheral

§PA13: PA13

PA13 peripheral

§PA14: PA14

PA14 peripheral

§PA15: PA15

PA15 peripheral

§PB0: PB0

PB0 peripheral

§PB1: PB1

PB1 peripheral

§PB2: PB2

PB2 peripheral

§PB3: PB3

PB3 peripheral

§PB4: PB4

PB4 peripheral

§PB5: PB5

PB5 peripheral

§PB6: PB6

PB6 peripheral

§PB7: PB7

PB7 peripheral

§PB8: PB8

PB8 peripheral

§PB9: PB9

PB9 peripheral

§PB10: PB10

PB10 peripheral

§PB11: PB11

PB11 peripheral

§PB12: PB12

PB12 peripheral

§PB13: PB13

PB13 peripheral

§PB14: PB14

PB14 peripheral

§PB15: PB15

PB15 peripheral

§PC0: PC0

PC0 peripheral

§PC1: PC1

PC1 peripheral

§PC2: PC2

PC2 peripheral

§PC3: PC3

PC3 peripheral

§PC4: PC4

PC4 peripheral

§PC5: PC5

PC5 peripheral

§PC6: PC6

PC6 peripheral

§PC7: PC7

PC7 peripheral

§PC8: PC8

PC8 peripheral

§PC9: PC9

PC9 peripheral

§PC10: PC10

PC10 peripheral

§PC11: PC11

PC11 peripheral

§PC12: PC12

PC12 peripheral

§PC13: PC13

PC13 peripheral

§PC14: PC14

PC14 peripheral

§PC15: PC15

PC15 peripheral

§PD0: PD0

PD0 peripheral

§PD1: PD1

PD1 peripheral

§PD2: PD2

PD2 peripheral

§PD3: PD3

PD3 peripheral

§PD4: PD4

PD4 peripheral

§PD5: PD5

PD5 peripheral

§PD6: PD6

PD6 peripheral

§PD7: PD7

PD7 peripheral

§PD8: PD8

PD8 peripheral

§PD9: PD9

PD9 peripheral

§PD10: PD10

PD10 peripheral

§PD11: PD11

PD11 peripheral

§PD12: PD12

PD12 peripheral

§PD13: PD13

PD13 peripheral

§PD14: PD14

PD14 peripheral

§PD15: PD15

PD15 peripheral

§PF0: PF0

PF0 peripheral

§PF1: PF1

PF1 peripheral

§PF2: PF2

PF2 peripheral

§PF3: PF3

PF3 peripheral

§PF4: PF4

PF4 peripheral

§PF5: PF5

PF5 peripheral

§PF6: PF6

PF6 peripheral

§PF7: PF7

PF7 peripheral

§PF8: PF8

PF8 peripheral

§PF9: PF9

PF9 peripheral

§PF10: PF10

PF10 peripheral

§PF11: PF11

PF11 peripheral

§PF12: PF12

PF12 peripheral

§PF13: PF13

PF13 peripheral

§PF14: PF14

PF14 peripheral

§PF15: PF15

PF15 peripheral

§I2C1: I2C1

I2C1 peripheral

§I2C2: I2C2

I2C2 peripheral

§IWDG: IWDG

IWDG peripheral

§LPTIM1: LPTIM1

LPTIM1 peripheral

§LPTIM2: LPTIM2

LPTIM2 peripheral

§LPUART1: LPUART1

LPUART1 peripheral

§PWR: PWR

PWR peripheral

§MCO1: MCO1

MCO1 peripheral

§RCC: RCC

RCC peripheral

§RNG: RNG

RNG peripheral

§RTC: RTC

RTC peripheral

§SPI1: SPI1

SPI1 peripheral

§SPI2: SPI2

SPI2 peripheral

§SYSCFG: SYSCFG

SYSCFG peripheral

§TAMP: TAMP

TAMP peripheral

§TIM1: TIM1

TIM1 peripheral

§TIM14: TIM14

TIM14 peripheral

§TIM16: TIM16

TIM16 peripheral

§TIM17: TIM17

TIM17 peripheral

§TIM2: TIM2

TIM2 peripheral

§TIM3: TIM3

TIM3 peripheral

§TIM6: TIM6

TIM6 peripheral

§TIM7: TIM7

TIM7 peripheral

§UCPD1: UCPD1

UCPD1 peripheral

§UCPD2: UCPD2

UCPD2 peripheral

§UID: UID

UID peripheral

§USART1: USART1

USART1 peripheral

§USART2: USART2

USART2 peripheral

§USART3: USART3

USART3 peripheral

§USART4: USART4

USART4 peripheral

§WWDG: WWDG

WWDG peripheral

§EXTI0: EXTI0

EXTI0 peripheral

§EXTI1: EXTI1

EXTI1 peripheral

§EXTI2: EXTI2

EXTI2 peripheral

§EXTI3: EXTI3

EXTI3 peripheral

§EXTI4: EXTI4

EXTI4 peripheral

§EXTI5: EXTI5

EXTI5 peripheral

§EXTI6: EXTI6

EXTI6 peripheral

§EXTI7: EXTI7

EXTI7 peripheral

§EXTI8: EXTI8

EXTI8 peripheral

§EXTI9: EXTI9

EXTI9 peripheral

§EXTI10: EXTI10

EXTI10 peripheral

§EXTI11: EXTI11

EXTI11 peripheral

§EXTI12: EXTI12

EXTI12 peripheral

§EXTI13: EXTI13

EXTI13 peripheral

§EXTI14: EXTI14

EXTI14 peripheral

§EXTI15: EXTI15

EXTI15 peripheral

§DMA1_CH1: DMA1_CH1

DMA1_CH1 peripheral

§DMA1_CH2: DMA1_CH2

DMA1_CH2 peripheral

§DMA1_CH3: DMA1_CH3

DMA1_CH3 peripheral

§DMA1_CH4: DMA1_CH4

DMA1_CH4 peripheral

§DMA1_CH5: DMA1_CH5

DMA1_CH5 peripheral

§DMA1_CH6: DMA1_CH6

DMA1_CH6 peripheral

§DMA1_CH7: DMA1_CH7

DMA1_CH7 peripheral

Implementations§

Source§

impl Peripherals

Source

pub unsafe fn steal() -> Self

Unsafely create an instance of this peripheral out of thin air.

§Safety

You must ensure that you’re only using one instance of this type at a time.

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fn borrow_mut(&mut self) -> &mut T

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impl<T> From<T> for T

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fn from(t: T) -> T

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Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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type Error = Infallible

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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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type Error = <U as TryFrom<T>>::Error

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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

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