Struct Pll

pub struct Pll {
    pub source: PllSource,
    pub prediv: PllPreDiv,
    pub mul: PllMul,
    pub divp: Option<PllPDiv>,
    pub divq: Option<PllQDiv>,
    pub divr: Option<PllRDiv>,
}

PLL Configuration

Use this struct to configure the PLL source, input frequency, multiplication factor, and output dividers. Be sure to keep check the datasheet for your specific part for the appropriate frequency ranges for each of these settings.

Fields

source: PllSource

PLL Source clock selection.

prediv: PllPreDiv

PLL pre-divider

mul: PllMul

PLL multiplication factor for VCO

divp: Option<PllPDiv>

PLL division factor for P clock (ADC Clock)

divq: Option<PllQDiv>

PLL division factor for Q clock (USB, I2S23, SAI1, FDCAN, QSPI)

divr: Option<PllRDiv>

PLL division factor for R clock (SYSCLK)

Trait Implementations

impl Clone for Pll

fn clone(&self) -> Pll

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Pll