embassy-stm32

Crates

git

Versions

stm32h573ri

Flavors

embassy_stm32::interrupt

Enum Interrupt

pub enum Interrupt {
Show 131 variants WWDG = 0, PVD_AVD = 1, RTC = 2, RTC_S = 3, TAMP = 4, RAMCFG = 5, FLASH = 6, FLASH_S = 7, GTZC = 8, RCC = 9, RCC_S = 10, EXTI0 = 11, EXTI1 = 12, EXTI2 = 13, EXTI3 = 14, EXTI4 = 15, EXTI5 = 16, EXTI6 = 17, EXTI7 = 18, EXTI8 = 19, EXTI9 = 20, EXTI10 = 21, EXTI11 = 22, EXTI12 = 23, EXTI13 = 24, EXTI14 = 25, EXTI15 = 26, GPDMA1_CHANNEL0 = 27, GPDMA1_CHANNEL1 = 28, GPDMA1_CHANNEL2 = 29, GPDMA1_CHANNEL3 = 30, GPDMA1_CHANNEL4 = 31, GPDMA1_CHANNEL5 = 32, GPDMA1_CHANNEL6 = 33, GPDMA1_CHANNEL7 = 34, IWDG = 35, SAES = 36, ADC1 = 37, DAC1 = 38, FDCAN1_IT0 = 39, FDCAN1_IT1 = 40, TIM1_BRK = 41, TIM1_UP = 42, TIM1_TRG_COM = 43, TIM1_CC = 44, TIM2 = 45, TIM3 = 46, TIM4 = 47, TIM5 = 48, TIM6 = 49, TIM7 = 50, I2C1_EV = 51, I2C1_ER = 52, I2C2_EV = 53, I2C2_ER = 54, SPI1 = 55, SPI2 = 56, SPI3 = 57, USART1 = 58, USART2 = 59, USART3 = 60, UART4 = 61, UART5 = 62, LPUART1 = 63, LPTIM1 = 64, TIM8_BRK = 65, TIM8_UP = 66, TIM8_TRG_COM = 67, TIM8_CC = 68, ADC2 = 69, LPTIM2 = 70, TIM15 = 71, TIM16 = 72, TIM17 = 73, USB_DRD_FS = 74, CRS = 75, UCPD1 = 76, FMC = 77, OCTOSPI1 = 78, SDMMC1 = 79, I2C3_EV = 80, I2C3_ER = 81, SPI4 = 82, SPI5 = 83, SPI6 = 84, USART6 = 85, USART10 = 86, USART11 = 87, SAI1 = 88, SAI2 = 89, GPDMA2_CHANNEL0 = 90, GPDMA2_CHANNEL1 = 91, GPDMA2_CHANNEL2 = 92, GPDMA2_CHANNEL3 = 93, GPDMA2_CHANNEL4 = 94, GPDMA2_CHANNEL5 = 95, GPDMA2_CHANNEL6 = 96, GPDMA2_CHANNEL7 = 97, UART7 = 98, UART8 = 99, UART9 = 100, UART12 = 101, SDMMC2 = 102, FPU = 103, ICACHE = 104, DCACHE1 = 105, ETH = 106, ETH_WKUP = 107, DCMI_PSSI = 108, FDCAN2_IT0 = 109, FDCAN2_IT1 = 110, CORDIC = 111, FMAC = 112, DTS = 113, RNG = 114, OTFDEC1 = 115, AES = 116, HASH = 117, PKA = 118, CEC = 119, TIM12 = 120, TIM13 = 121, TIM14 = 122, I3C1_EV = 123, I3C1_ER = 124, I2C4_EV = 125, I2C4_ER = 126, LPTIM3 = 127, LPTIM4 = 128, LPTIM5 = 129, LPTIM6 = 130,
}

Variants§

§

WWDG = 0

0 - WWDG

§

PVD_AVD = 1

1 - PVD_AVD

§

RTC = 2

2 - RTC

§

RTC_S = 3

3 - RTC_S

§

TAMP = 4

4 - TAMP

§

RAMCFG = 5

5 - RAMCFG

§

FLASH = 6

6 - FLASH

§

FLASH_S = 7

7 - FLASH_S

§

GTZC = 8

8 - GTZC

§

RCC = 9

9 - RCC

§

RCC_S = 10

10 - RCC_S

§

EXTI0 = 11

11 - EXTI0

§

EXTI1 = 12

12 - EXTI1

§

EXTI2 = 13

13 - EXTI2

§

EXTI3 = 14

14 - EXTI3

§

EXTI4 = 15

15 - EXTI4

§

EXTI5 = 16

16 - EXTI5

§

EXTI6 = 17

17 - EXTI6

§

EXTI7 = 18

18 - EXTI7

§

EXTI8 = 19

19 - EXTI8

§

EXTI9 = 20

20 - EXTI9

§

EXTI10 = 21

21 - EXTI10

§

EXTI11 = 22

22 - EXTI11

§

EXTI12 = 23

23 - EXTI12

§

EXTI13 = 24

24 - EXTI13

§

EXTI14 = 25

25 - EXTI14

§

EXTI15 = 26

26 - EXTI15

§

GPDMA1_CHANNEL0 = 27

27 - GPDMA1_CHANNEL0

§

GPDMA1_CHANNEL1 = 28

28 - GPDMA1_CHANNEL1

§

GPDMA1_CHANNEL2 = 29

29 - GPDMA1_CHANNEL2

§

GPDMA1_CHANNEL3 = 30

30 - GPDMA1_CHANNEL3

§

GPDMA1_CHANNEL4 = 31

31 - GPDMA1_CHANNEL4

§

GPDMA1_CHANNEL5 = 32

32 - GPDMA1_CHANNEL5

§

GPDMA1_CHANNEL6 = 33

33 - GPDMA1_CHANNEL6

§

GPDMA1_CHANNEL7 = 34

34 - GPDMA1_CHANNEL7

§

IWDG = 35

35 - IWDG

§

SAES = 36

36 - SAES

§

ADC1 = 37

37 - ADC1

§

DAC1 = 38

38 - DAC1

§

FDCAN1_IT0 = 39

39 - FDCAN1_IT0

§

FDCAN1_IT1 = 40

40 - FDCAN1_IT1

§

TIM1_BRK = 41

41 - TIM1_BRK

§

TIM1_UP = 42

42 - TIM1_UP

§

TIM1_TRG_COM = 43

43 - TIM1_TRG_COM

§

TIM1_CC = 44

44 - TIM1_CC

§

TIM2 = 45

45 - TIM2

§

TIM3 = 46

46 - TIM3

§

TIM4 = 47

47 - TIM4

§

TIM5 = 48

48 - TIM5

§

TIM6 = 49

49 - TIM6

§

TIM7 = 50

50 - TIM7

§

I2C1_EV = 51

51 - I2C1_EV

§

I2C1_ER = 52

52 - I2C1_ER

§

I2C2_EV = 53

53 - I2C2_EV

§

I2C2_ER = 54

54 - I2C2_ER

§

SPI1 = 55

55 - SPI1

§

SPI2 = 56

56 - SPI2

§

SPI3 = 57

57 - SPI3

§

USART1 = 58

58 - USART1

§

USART2 = 59

59 - USART2

§

USART3 = 60

60 - USART3

§

UART4 = 61

61 - UART4

§

UART5 = 62

62 - UART5

§

LPUART1 = 63

63 - LPUART1

§

LPTIM1 = 64

64 - LPTIM1

§

TIM8_BRK = 65

65 - TIM8_BRK

§

TIM8_UP = 66

66 - TIM8_UP

§

TIM8_TRG_COM = 67

67 - TIM8_TRG_COM

§

TIM8_CC = 68

68 - TIM8_CC

§

ADC2 = 69

69 - ADC2

§

LPTIM2 = 70

70 - LPTIM2

§

TIM15 = 71

71 - TIM15

§

TIM16 = 72

72 - TIM16

§

TIM17 = 73

73 - TIM17

§

USB_DRD_FS = 74

74 - USB_DRD_FS

§

CRS = 75

75 - CRS

§

UCPD1 = 76

76 - UCPD1

§

FMC = 77

77 - FMC

§

OCTOSPI1 = 78

78 - OCTOSPI1

§

SDMMC1 = 79

79 - SDMMC1

§

I2C3_EV = 80

80 - I2C3_EV

§

I2C3_ER = 81

81 - I2C3_ER

§

SPI4 = 82

82 - SPI4

§

SPI5 = 83

83 - SPI5

§

SPI6 = 84

84 - SPI6

§

USART6 = 85

85 - USART6

§

USART10 = 86

86 - USART10

§

USART11 = 87

87 - USART11

§

SAI1 = 88

88 - SAI1

§

SAI2 = 89

89 - SAI2

§

GPDMA2_CHANNEL0 = 90

90 - GPDMA2_CHANNEL0

§

GPDMA2_CHANNEL1 = 91

91 - GPDMA2_CHANNEL1

§

GPDMA2_CHANNEL2 = 92

92 - GPDMA2_CHANNEL2

§

GPDMA2_CHANNEL3 = 93

93 - GPDMA2_CHANNEL3

§

GPDMA2_CHANNEL4 = 94

94 - GPDMA2_CHANNEL4

§

GPDMA2_CHANNEL5 = 95

95 - GPDMA2_CHANNEL5

§

GPDMA2_CHANNEL6 = 96

96 - GPDMA2_CHANNEL6

§

GPDMA2_CHANNEL7 = 97

97 - GPDMA2_CHANNEL7

§

UART7 = 98

98 - UART7

§

UART8 = 99

99 - UART8

§

UART9 = 100

100 - UART9

§

UART12 = 101

101 - UART12

§

SDMMC2 = 102

102 - SDMMC2

§

FPU = 103

103 - FPU

§

ICACHE = 104

104 - ICACHE

§

DCACHE1 = 105

105 - DCACHE1

§

ETH = 106

106 - ETH

§

ETH_WKUP = 107

107 - ETH_WKUP

§

DCMI_PSSI = 108

108 - DCMI_PSSI

§

FDCAN2_IT0 = 109

109 - FDCAN2_IT0

§

FDCAN2_IT1 = 110

110 - FDCAN2_IT1

§

CORDIC = 111

111 - CORDIC

§

FMAC = 112

112 - FMAC

§

DTS = 113

113 - DTS

§

RNG = 114

114 - RNG

§

OTFDEC1 = 115

115 - OTFDEC1

§

AES = 116

116 - AES

§

HASH = 117

117 - HASH

§

PKA = 118

118 - PKA

§

CEC = 119

119 - CEC

§

TIM12 = 120

120 - TIM12

§

TIM13 = 121

121 - TIM13

§

TIM14 = 122

122 - TIM14

§

I3C1_EV = 123

123 - I3C1_EV

§

I3C1_ER = 124

124 - I3C1_ER

§

I2C4_EV = 125

125 - I2C4_EV

§

I2C4_ER = 126

126 - I2C4_ER

§

LPTIM3 = 127

127 - LPTIM3

§

LPTIM4 = 128

128 - LPTIM4

§

LPTIM5 = 129

129 - LPTIM5

§

LPTIM6 = 130

130 - LPTIM6

Trait Implementations§

§

impl Clone for Interrupt

§

fn clone(&self) -> Interrupt

Returns a copy of the value. Read more
1.0.0 · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
§

impl Debug for Interrupt

§

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter. Read more
§

impl InterruptNumber for Interrupt

§

fn number(self) -> u16

Return the interrupt number associated with this variant. Read more
§

impl PartialEq for Interrupt

§

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.
1.0.0 · Source§

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
§

impl Copy for Interrupt

§

impl Eq for Interrupt

§

impl StructuralPartialEq for Interrupt

Auto Trait Implementations§

Blanket Implementations§

Source§

impl<T> Any for T
where T: 'static + ?Sized,

Source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
Source§

impl<T> Borrow<T> for T
where T: ?Sized,

Source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
Source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

Source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
Source§

impl<T> CloneToUninit for T
where T: Clone,

Source§

unsafe fn clone_to_uninit(&self, dst: *mut T)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dst. Read more
Source§

impl<T> From<T> for T

Source§

fn from(t: T) -> T

Returns the argument unchanged.

Source§

impl<T> InterruptExt for T
where T: InterruptNumber + Copy,

Source§

unsafe fn enable(self)

Enable the interrupt.
Source§

fn disable(self)

Disable the interrupt.
Source§

fn is_active(self) -> bool

Check if interrupt is being handled.
Source§

fn is_enabled(self) -> bool

Check if interrupt is enabled.
Source§

fn is_pending(self) -> bool

Check if interrupt is pending.
Source§

fn pend(self)

Set interrupt pending.
Source§

fn unpend(self)

Unset interrupt pending.
Source§

fn get_priority(self) -> Priority

Get the priority of the interrupt.
Source§

fn set_priority(self, prio: Priority)

Set the interrupt priority.
Source§

fn set_priority_with_cs(self, _cs: CriticalSection<'_>, prio: Priority)

Set the interrupt priority with an already-acquired critical section Read more
Source§

impl<T, U> Into<U> for T
where U: From<T>,

Source§

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

Source§

impl<T, U> TryFrom<U> for T
where U: Into<T>,

Source§

type Error = Infallible

The type returned in the event of a conversion error.
Source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
Source§

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

Source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
Source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.