Struct Spi 

pub struct Spi<'d, M: PeriMode, CM: CommunicationMode> { /* private fields */ }

SPI driver.

Implementations

impl<'d> Spi<'d, Async, Slave>

pub fn into_ring_buffered<W: Word>( self, dma_buf: &'d mut [W], ) -> RingBufferedSpiRx<'d, W>

Turn the Spi into a buffered spi which can continuously receive in the background without the possibility of losing bytes. The dma_buf is a buffer registered to the DMA controller, and must be large enough to prevent overflows.

impl<'d, M: PeriMode, CM: CommunicationMode> Spi<'d, M, CM>

pub fn set_config(&mut self, config: &Config) -> Result<(), ConfigError>

Reconfigures it with the supplied config.

pub fn set_crc(&mut self, config: CrcConfig)

Enable or disable hardware CRC calculation.

pub fn crc_value(&self) -> u16

Read the TX CRC register value.

pub fn rx_crc_value(&self) -> u16

Read the TX CRC register value.

pub fn get_current_config(&self) -> Config

Get current SPI configuration.

pub fn blocking_write<W: Word>(&mut self, words: &[W]) -> Result<(), Error>

Blocking write.

pub fn blocking_read<W: Word>(&mut self, words: &mut [W]) -> Result<(), Error>

Blocking read.

pub fn blocking_transfer_in_place<W: Word>( &mut self, words: &mut [W], ) -> Result<(), Error>

Blocking in-place bidirectional transfer.

This writes the contents of data on MOSI, and puts the received data on MISO in data, at the same time.

pub fn blocking_transfer<W: Word>( &mut self, read: &mut [W], write: &[W], ) -> Result<(), Error>

Blocking bidirectional transfer.

This transfers both buffers at the same time, so it is NOT equivalent to write followed by read.

The transfer runs for max(read.len(), write.len()) bytes. If read is shorter extra bytes are ignored. If write is shorter it is padded with zero bytes.

impl<'d> Spi<'d, Blocking, Slave>

pub fn new_blocking_slave<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, cs: Peri<'d, impl CsPin<T>>, config: Config, ) -> Self

Create a new blocking SPI slave driver.

impl<'d> Spi<'d, Blocking, Master>

pub fn new_blocking<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, config: Config, ) -> Self

Create a new blocking SPI driver.

pub fn new_blocking_rxonly<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, miso: Peri<'d, impl MisoPin<T>>, config: Config, ) -> Self

Create a new blocking SPI driver, in RX-only mode (only MISO pin, no MOSI).

pub fn new_blocking_txonly<T: Instance>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, config: Config, ) -> Self

Create a new blocking SPI driver, in TX-only mode (only MOSI pin, no MISO).

pub fn new_blocking_txonly_nosck<T: Instance>( peri: Peri<'d, T>, mosi: Peri<'d, impl MosiPin<T>>, config: Config, ) -> Self

Create a new SPI driver, in TX-only mode, without SCK pin.

This can be useful for bit-banging non-SPI protocols.

impl<'d> Spi<'d, Async, Slave>

pub fn new_slave<T: Instance, D1: TxDma<T>, D2: RxDma<T>, C: CsPin<T> + ExtiPin>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, cs: Peri<'d, C>, tx_dma: Peri<'d, D1>, rx_dma: Peri<'d, D2>, irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + Binding<<<C as ExtiPin>::ExtiChannel as Channel>::IRQ, InterruptHandler<<<C as ExtiPin>::ExtiChannel as Channel>::IRQ>> + 'd, exti: Option<Peri<'d, C::ExtiChannel>>, config: Config, ) -> Self

Create a new SPI slave driver.

pub fn new_rxonly_slave<T: Instance, D1: RxDma<T>, C: CsPin<T> + ExtiPin>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, cs: Peri<'d, C>, rx_dma: Peri<'d, D1>, irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<<<C as ExtiPin>::ExtiChannel as Channel>::IRQ, InterruptHandler<<<C as ExtiPin>::ExtiChannel as Channel>::IRQ>> + 'd, exti: Option<Peri<'d, C::ExtiChannel>>, config: Config, ) -> Self

Create a new SPI slave driver in RX-only mode (only MOSI pin, no MISO).

impl<'d> Spi<'d, Async, Master>

pub fn new<T: Instance, D1: TxDma<T>, D2: RxDma<T>>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, miso: Peri<'d, impl MisoPin<T>>, tx_dma: Peri<'d, D1>, rx_dma: Peri<'d, D2>, _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + Binding<D2::Interrupt, InterruptHandler<D2>> + 'd, config: Config, ) -> Self

Create a new SPI driver.

pub fn new_rxonly<T: Instance, D2: RxDma<T>>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, miso: Peri<'d, impl MisoPin<T>>, rx_dma: Peri<'d, D2>, _irq: impl Binding<D2::Interrupt, InterruptHandler<D2>> + 'd, config: Config, ) -> Self

Create a new SPI driver, in RX-only mode (only MISO pin, no MOSI).

pub fn new_txonly<T: Instance, D1: TxDma<T>>( peri: Peri<'d, T>, sck: Peri<'d, impl SckPin<T>>, mosi: Peri<'d, impl MosiPin<T>>, tx_dma: Peri<'d, D1>, _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a new SPI driver, in TX-only mode (only MOSI pin, no MISO).

pub fn new_txonly_nosck<T: Instance, D1: TxDma<T>>( peri: Peri<'d, T>, mosi: Peri<'d, impl MosiPin<T>>, tx_dma: Peri<'d, D1>, _irq: impl Binding<D1::Interrupt, InterruptHandler<D1>> + 'd, config: Config, ) -> Self

Create a new SPI driver, in TX-only mode, without SCK pin.

This can be useful for bit-banging non-SPI protocols.

impl<'d> Spi<'d, Async, Master>

pub async fn write<W: Word>(&mut self, data: &[W]) -> Result<(), Error>

SPI write, using DMA.

pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<(), Error>

SPI read, using DMA.

pub async fn transfer<W: Word>( &mut self, read: &mut [W], write: &[W], ) -> Result<(), Error>

Bidirectional transfer, using DMA.

This transfers both buffers at the same time, so it is NOT equivalent to write followed by read.

The transfer runs for max(read.len(), write.len()) bytes. If read is shorter extra bytes are ignored. If write is shorter it is padded with zero bytes.

pub async fn transfer_in_place<W: Word>( &mut self, data: &mut [W], ) -> Result<(), Error>

In-place bidirectional transfer, using DMA.

This writes the contents of data on MOSI, and puts the received data on MISO in data, at the same time.

impl<'d> Spi<'d, Async, Slave>

pub async fn read<W: Word>(&mut self, data: &mut [W]) -> Result<usize, Error>

Reads data from the SPI bus, using DMA.

Clocks out dummy bytes so the master can clock data in. Blocks until data is full or the slave is deselected. Returns the number of bytes read. If the master deselects the slave before data is full, the number of bytes received so far is returned, like embassy-nrf’s Spis.

pub async fn write<W: Word>(&mut self, data: &[W]) -> Result<usize, Error>

Sends data on the SPI bus, using DMA.

Any data clocked in from the master is discarded. Blocks until data is fully sent or the slave is deselected. Returns the number of bytes sent. If the master deselects the slave before data is fully sent, the number of bytes sent so far is returned, like embassy-nrf’s Spis.

pub async fn transfer<W: Word>( &mut self, read: &mut [W], write: &[W], ) -> Result<(usize, usize), Error>

Simultaneously sends and receives data, using DMA.

This transfers both buffers at the same time, so it is NOT equivalent to write followed by read.

The transfer runs for max(read.len(), write.len()) bytes. If read is shorter extra bytes are ignored. If write is shorter it is padded with zero bytes.

Blocks until the longest buffer is exhausted or the slave is deselected. Returns the number of bytes transferred (n_rx, n_tx). If the master deselects the slave first, the number of bytes transferred so far is returned, like embassy-nrf’s Spis.

pub async fn transfer_in_place<W: Word>( &mut self, data: &mut [W], ) -> Result<usize, Error>

In-place bidirectional transfer, using DMA.

This writes the contents of data on MOSI, and puts the received data on MISO in data, at the same time. Returns the number of bytes transferred. If the master deselects the slave before data is exhausted, the number of bytes transferred so far is returned, like embassy-nrf’s Spis.

Trait Implementations

impl<'d, M: PeriMode, CM: CommunicationMode> Drop for Spi<'d, M, CM>

fn drop(&mut self)

Executes the destructor for this type.

fn pin_drop(self: Pin<&mut Self>)

🔬This is a nightly-only experimental API. (pin_ergonomics)

Execute the destructor for this type, but different to Drop::drop, it requires self to be pinned.

impl<'d, M: PeriMode, CM: CommunicationMode> ErrorType for Spi<'d, M, CM>

type Error = Error

Error type.

impl<'d, M: PeriMode, CM: CommunicationMode> SetConfig for Spi<'d, M, CM>

type Config = Config

The configuration type used by this driver.

type ConfigError = ConfigError

The error type that can occur if set_config fails.

fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError>

Set the configuration of the driver.

impl<'d, W: Word, M: PeriMode> SpiBus<W> for Spi<'d, M, Master>

fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>

Read words from the slave.

fn write(&mut self, words: &[W]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

fn transfer(&mut self, read: &mut [W], write: &[W]) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

fn transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

impl<'d, W: Word> SpiBus<W> for Spi<'d, Async, Master>

async fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

async fn write(&mut self, words: &[W]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

async fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error>

Read words from the slave.

async fn transfer( &mut self, read: &mut [W], write: &[W], ) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

async fn transfer_in_place( &mut self, words: &mut [W], ) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

impl<'d, M: PeriMode, CM: CommunicationMode> Transfer<u8> for Spi<'d, M, CM>

type Error = Error

Error type

fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error>

Sends words to the slave. Returns the words received from the slave

impl<'d, M: PeriMode, CM: CommunicationMode> Transfer<u16> for Spi<'d, M, CM>

type Error = Error

Error type

fn transfer<'w>( &mut self, words: &'w mut [u16], ) -> Result<&'w [u16], Self::Error>

Sends words to the slave. Returns the words received from the slave

impl<'d, M: PeriMode, CM: CommunicationMode> Write<u8> for Spi<'d, M, CM>

type Error = Error

Error type

fn write(&mut self, words: &[u8]) -> Result<(), Self::Error>

Sends words to the slave, ignoring all the incoming words

impl<'d, M: PeriMode, CM: CommunicationMode> Write<u16> for Spi<'d, M, CM>

type Error = Error

Error type

fn write(&mut self, words: &[u16]) -> Result<(), Self::Error>

Sends words to the slave, ignoring all the incoming words