Struct ParallelPair 

pub struct ParallelPair<'a, 'd, T, M, S, MN, SN>
where
    T: Instance,
    M: TransceiverMarker + NextChannelForInstance<T>,
    S: PinSet,
    MN: TransceiverMarker + NextChannelForInstance<T>,
    SN: PinSet,
{
    pub even: Transceiver<'a, 'd, T, M, S, ParallelPaired, OwnPins, Enabled>,
    pub odd: Transceiver<'a, 'd, T, MN, SN, ParallelPaired, OwnPins, Enabled>,
}

An enabled dual-mode parallel-input pair.

Fields

even: Transceiver<'a, 'd, T, M, S, ParallelPaired, OwnPins, Enabled>

Even transceiver (channel y), Dual packing, owns the DATINR register.

odd: Transceiver<'a, 'd, T, MN, SN, ParallelPaired, OwnPins, Enabled>

Odd transceiver (channel y + 1), Standard packing, fed by the auto-copy.

Implementations

impl<'a, 'd, T, M, S, MN, SN> ParallelPair<'a, 'd, T, M, S, MN, SN>

where T: Instance, M: TransceiverMarker + NextChannelForInstance<T>, S: PinSet, MN: TransceiverMarker + NextChannelForInstance<T>, SN: PinSet,

pub fn write(&self, data: [u16; 2])

Write two samples: data[0] to channel y (INDAT0) and data[1] to channel y + 1 (INDAT1, copied by the hardware into the odd channel’s INDAT0).

Note

DATINR is not buffered: samples written before the conversion starts are lost, so data must be present when the filter latches it.

pub fn get_datinr_as_ptr(&self) -> *mut u32

Pointer to the even channel’s DATINR register, for feeding via DMA.

Each u32 DMA word packs two samples: (data[1] as u32) << 16 | data[0] as u32.

pub fn set_offset(&mut self, offsets: [u32; 2])

Set the offset for both channels ([0] = even, [1] = odd).

pub fn disable(self) -> ParallelPairDisabled<'a, 'd, T, M, S, MN, SN>

Disable both channels.