Struct DsiHostPhyConfig 

pub struct DsiHostPhyConfig {

    pub lanes: DsiHostPhyLanes,
    pub stop_wait_time: u8,
    pub tx_escape_div: u8,
    pub acr: bool,
    pub crc_rx: bool,
    pub ecc_rx: bool,
    pub eotp_rx: bool,
    pub eotp_tx: bool,
    pub bta: bool,
    pub clock_hs2lp: u16,
    pub clock_lp2hs: u16,
    pub data_hs2lp: u8,
    pub data_lp2hs: u8,
    pub data_mrd: u16,
}

DSI PHY Configuration

Fields

lanes: DsiHostPhyLanes

Number of DSI PHY lanes

stop_wait_time: u8

Stop wait time. Minimum wait period to request a high speed transmission after the stop state

tx_escape_div: u8

TX escape clock div relative to lane byte clock

acr: bool

D-PHY automatic clock lane control. Stops providing clock automatically.

crc_rx: bool

Enable CRC RX enable

ecc_rx: bool

Enable ECC RX enable

eotp_rx: bool

EoTp RX enable

eotp_tx: bool

EoTp TX enable

bta: bool

Bus Turnaround enable

clock_hs2lp: u16

Clock high speed to low power timing

clock_lp2hs: u16

Clock low power to high speed timing

data_hs2lp: u8

Data high speed to low power timing

data_lp2hs: u8

Data low power to high speed timing

data_mrd: u16

Data maximum read time