embassy-stm32

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embassy_stm32::interrupt

Enum Interrupt

pub enum Interrupt {
Show 147 variants PVD_PVM = 0, DTS = 2, IWDG = 3, WWDG = 4, RCC = 5, FLASH = 8, RAMECC = 9, FPU = 10, TAMP = 13, EXTI0 = 16, EXTI1 = 17, EXTI2 = 18, EXTI3 = 19, EXTI4 = 20, EXTI5 = 21, EXTI6 = 22, EXTI7 = 23, EXTI8 = 24, EXTI9 = 25, EXTI10 = 26, EXTI11 = 27, EXTI12 = 28, EXTI13 = 29, EXTI14 = 30, EXTI15 = 31, RTC = 32, SAES = 33, CRYP = 34, PKA = 35, HASH = 36, RNG = 37, ADC1_2 = 38, GPDMA1_CHANNEL0 = 39, GPDMA1_CHANNEL1 = 40, GPDMA1_CHANNEL2 = 41, GPDMA1_CHANNEL3 = 42, GPDMA1_CHANNEL4 = 43, GPDMA1_CHANNEL5 = 44, GPDMA1_CHANNEL6 = 45, GPDMA1_CHANNEL7 = 46, TIM1_BRK = 47, TIM1_UP = 48, TIM1_TRG_COM = 49, TIM1_CC = 50, TIM2 = 51, TIM3 = 52, TIM4 = 53, TIM5 = 54, TIM6 = 55, TIM7 = 56, TIM9 = 57, SPI1 = 58, SPI2 = 59, SPI3 = 60, SPI4 = 61, SPI5 = 62, SPI6 = 63, HPDMA1_CHANNEL0 = 64, HPDMA1_CHANNEL1 = 65, HPDMA1_CHANNEL2 = 66, HPDMA1_CHANNEL3 = 67, HPDMA1_CHANNEL4 = 68, HPDMA1_CHANNEL5 = 69, HPDMA1_CHANNEL6 = 70, HPDMA1_CHANNEL7 = 71, SAI1_A = 72, SAI1_B = 73, SAI2_A = 74, SAI2_B = 75, I2C1_EV = 76, I2C1_ER = 77, I2C2_EV = 78, I2C2_ER = 79, I2C3_EV = 80, I2C3_ER = 81, USART1 = 82, USART2 = 83, USART3 = 84, UART4 = 85, UART5 = 86, UART7 = 87, UART8 = 88, I3C1_EV = 89, I3C1_ER = 90, OTG_HS = 91, ETH = 92, CORDIC = 93, GFXTIM = 94, DCMIPP = 95, LTDC = 96, LTDC_ER = 97, DMA2D = 98, JPEG = 99, GFXMMU = 100, I3C1_WKUP = 101, MCE1 = 102, MCE2 = 103, MCE3 = 104, XSPI1 = 105, XSPI2 = 106, FMC = 107, SDMMC1 = 108, SDMMC2 = 109, OTG_FS = 112, TIM12 = 113, TIM13 = 114, TIM14 = 115, TIM15 = 116, TIM16 = 117, TIM17 = 118, LPTIM1 = 119, LPTIM2 = 120, LPTIM3 = 121, LPTIM4 = 122, LPTIM5 = 123, SPDIF_RX = 124, MDIOS = 125, ADF1_FLT0 = 126, CRS = 127, UCPD1 = 128, CEC = 129, PSSI = 130, LPUART1 = 131, WAKEUP_PIN = 132, GPDMA1_CHANNEL8 = 133, GPDMA1_CHANNEL9 = 134, GPDMA1_CHANNEL10 = 135, GPDMA1_CHANNEL11 = 136, GPDMA1_CHANNEL12 = 137, GPDMA1_CHANNEL13 = 138, GPDMA1_CHANNEL14 = 139, GPDMA1_CHANNEL15 = 140, HPDMA1_CHANNEL8 = 141, HPDMA1_CHANNEL9 = 142, HPDMA1_CHANNEL10 = 143, HPDMA1_CHANNEL11 = 144, HPDMA1_CHANNEL12 = 145, HPDMA1_CHANNEL13 = 146, HPDMA1_CHANNEL14 = 147, HPDMA1_CHANNEL15 = 148, GPU2D = 149, GPU2D_ER = 150, ICACHE = 151, FDCAN1_IT0 = 152, FDCAN1_IT1 = 153, FDCAN2_IT0 = 154, FDCAN2_IT1 = 155,
}

Variants§

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PVD_PVM = 0

0 - PVD_PVM

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DTS = 2

2 - DTS

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IWDG = 3

3 - IWDG

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WWDG = 4

4 - WWDG

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RCC = 5

5 - RCC

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FLASH = 8

8 - FLASH

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RAMECC = 9

9 - RAMECC

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FPU = 10

10 - FPU

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TAMP = 13

13 - TAMP

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EXTI0 = 16

16 - EXTI0

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EXTI1 = 17

17 - EXTI1

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EXTI2 = 18

18 - EXTI2

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EXTI3 = 19

19 - EXTI3

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EXTI4 = 20

20 - EXTI4

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EXTI5 = 21

21 - EXTI5

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EXTI6 = 22

22 - EXTI6

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EXTI7 = 23

23 - EXTI7

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EXTI8 = 24

24 - EXTI8

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EXTI9 = 25

25 - EXTI9

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EXTI10 = 26

26 - EXTI10

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EXTI11 = 27

27 - EXTI11

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EXTI12 = 28

28 - EXTI12

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EXTI13 = 29

29 - EXTI13

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EXTI14 = 30

30 - EXTI14

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EXTI15 = 31

31 - EXTI15

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RTC = 32

32 - RTC

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SAES = 33

33 - SAES

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CRYP = 34

34 - CRYP

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PKA = 35

35 - PKA

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HASH = 36

36 - HASH

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RNG = 37

37 - RNG

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ADC1_2 = 38

38 - ADC1_2

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GPDMA1_CHANNEL0 = 39

39 - GPDMA1_CHANNEL0

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GPDMA1_CHANNEL1 = 40

40 - GPDMA1_CHANNEL1

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GPDMA1_CHANNEL2 = 41

41 - GPDMA1_CHANNEL2

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GPDMA1_CHANNEL3 = 42

42 - GPDMA1_CHANNEL3

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GPDMA1_CHANNEL4 = 43

43 - GPDMA1_CHANNEL4

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GPDMA1_CHANNEL5 = 44

44 - GPDMA1_CHANNEL5

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GPDMA1_CHANNEL6 = 45

45 - GPDMA1_CHANNEL6

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GPDMA1_CHANNEL7 = 46

46 - GPDMA1_CHANNEL7

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TIM1_BRK = 47

47 - TIM1_BRK

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TIM1_UP = 48

48 - TIM1_UP

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TIM1_TRG_COM = 49

49 - TIM1_TRG_COM

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TIM1_CC = 50

50 - TIM1_CC

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TIM2 = 51

51 - TIM2

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TIM3 = 52

52 - TIM3

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TIM4 = 53

53 - TIM4

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TIM5 = 54

54 - TIM5

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TIM6 = 55

55 - TIM6

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TIM7 = 56

56 - TIM7

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TIM9 = 57

57 - TIM9

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SPI1 = 58

58 - SPI1

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SPI2 = 59

59 - SPI2

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SPI3 = 60

60 - SPI3

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SPI4 = 61

61 - SPI4

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SPI5 = 62

62 - SPI5

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SPI6 = 63

63 - SPI6

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HPDMA1_CHANNEL0 = 64

64 - HPDMA1_CHANNEL0

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HPDMA1_CHANNEL1 = 65

65 - HPDMA1_CHANNEL1

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HPDMA1_CHANNEL2 = 66

66 - HPDMA1_CHANNEL2

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HPDMA1_CHANNEL3 = 67

67 - HPDMA1_CHANNEL3

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HPDMA1_CHANNEL4 = 68

68 - HPDMA1_CHANNEL4

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HPDMA1_CHANNEL5 = 69

69 - HPDMA1_CHANNEL5

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HPDMA1_CHANNEL6 = 70

70 - HPDMA1_CHANNEL6

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HPDMA1_CHANNEL7 = 71

71 - HPDMA1_CHANNEL7

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SAI1_A = 72

72 - SAI1_A

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SAI1_B = 73

73 - SAI1_B

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SAI2_A = 74

74 - SAI2_A

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SAI2_B = 75

75 - SAI2_B

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I2C1_EV = 76

76 - I2C1_EV

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I2C1_ER = 77

77 - I2C1_ER

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I2C2_EV = 78

78 - I2C2_EV

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I2C2_ER = 79

79 - I2C2_ER

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I2C3_EV = 80

80 - I2C3_EV

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I2C3_ER = 81

81 - I2C3_ER

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USART1 = 82

82 - USART1

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USART2 = 83

83 - USART2

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USART3 = 84

84 - USART3

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UART4 = 85

85 - UART4

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UART5 = 86

86 - UART5

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UART7 = 87

87 - UART7

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UART8 = 88

88 - UART8

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I3C1_EV = 89

89 - I3C1_EV

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I3C1_ER = 90

90 - I3C1_ER

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OTG_HS = 91

91 - OTG_HS

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ETH = 92

92 - ETH

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CORDIC = 93

93 - CORDIC

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GFXTIM = 94

94 - GFXTIM

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DCMIPP = 95

95 - DCMIPP

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LTDC = 96

96 - LTDC

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LTDC_ER = 97

97 - LTDC_ER

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DMA2D = 98

98 - DMA2D

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JPEG = 99

99 - JPEG

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GFXMMU = 100

100 - GFXMMU

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I3C1_WKUP = 101

101 - I3C1_WKUP

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MCE1 = 102

102 - MCE1

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MCE2 = 103

103 - MCE2

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MCE3 = 104

104 - MCE3

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XSPI1 = 105

105 - XSPI1

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XSPI2 = 106

106 - XSPI2

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FMC = 107

107 - FMC

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SDMMC1 = 108

108 - SDMMC1

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SDMMC2 = 109

109 - SDMMC2

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OTG_FS = 112

112 - OTG_FS

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TIM12 = 113

113 - TIM12

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TIM13 = 114

114 - TIM13

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TIM14 = 115

115 - TIM14

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TIM15 = 116

116 - TIM15

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TIM16 = 117

117 - TIM16

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TIM17 = 118

118 - TIM17

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LPTIM1 = 119

119 - LPTIM1

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LPTIM2 = 120

120 - LPTIM2

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LPTIM3 = 121

121 - LPTIM3

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LPTIM4 = 122

122 - LPTIM4

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LPTIM5 = 123

123 - LPTIM5

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SPDIF_RX = 124

124 - SPDIF_RX

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MDIOS = 125

125 - MDIOS

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ADF1_FLT0 = 126

126 - ADF1_FLT0

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CRS = 127

127 - CRS

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UCPD1 = 128

128 - UCPD1

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CEC = 129

129 - CEC

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PSSI = 130

130 - PSSI

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LPUART1 = 131

131 - LPUART1

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WAKEUP_PIN = 132

132 - WAKEUP_PIN

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GPDMA1_CHANNEL8 = 133

133 - GPDMA1_CHANNEL8

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GPDMA1_CHANNEL9 = 134

134 - GPDMA1_CHANNEL9

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GPDMA1_CHANNEL10 = 135

135 - GPDMA1_CHANNEL10

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GPDMA1_CHANNEL11 = 136

136 - GPDMA1_CHANNEL11

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GPDMA1_CHANNEL12 = 137

137 - GPDMA1_CHANNEL12

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GPDMA1_CHANNEL13 = 138

138 - GPDMA1_CHANNEL13

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GPDMA1_CHANNEL14 = 139

139 - GPDMA1_CHANNEL14

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GPDMA1_CHANNEL15 = 140

140 - GPDMA1_CHANNEL15

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HPDMA1_CHANNEL8 = 141

141 - HPDMA1_CHANNEL8

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HPDMA1_CHANNEL9 = 142

142 - HPDMA1_CHANNEL9

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HPDMA1_CHANNEL10 = 143

143 - HPDMA1_CHANNEL10

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HPDMA1_CHANNEL11 = 144

144 - HPDMA1_CHANNEL11

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HPDMA1_CHANNEL12 = 145

145 - HPDMA1_CHANNEL12

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HPDMA1_CHANNEL13 = 146

146 - HPDMA1_CHANNEL13

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HPDMA1_CHANNEL14 = 147

147 - HPDMA1_CHANNEL14

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HPDMA1_CHANNEL15 = 148

148 - HPDMA1_CHANNEL15

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GPU2D = 149

149 - GPU2D

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GPU2D_ER = 150

150 - GPU2D_ER

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ICACHE = 151

151 - ICACHE

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FDCAN1_IT0 = 152

152 - FDCAN1_IT0

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FDCAN1_IT1 = 153

153 - FDCAN1_IT1

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FDCAN2_IT0 = 154

154 - FDCAN2_IT0

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FDCAN2_IT1 = 155

155 - FDCAN2_IT1

Trait Implementations§

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impl Clone for Interrupt

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fn clone(&self) -> Interrupt

Returns a copy of the value. Read more
1.0.0 · source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl Debug for Interrupt

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fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter. Read more
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impl InterruptNumber for Interrupt

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fn number(self) -> u16

Return the interrupt number associated with this variant. Read more
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impl PartialEq for Interrupt

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fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.
1.0.0 · source§

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl Copy for Interrupt

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impl Eq for Interrupt

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impl StructuralPartialEq for Interrupt

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dst: *mut T)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dst. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T> InterruptExt for T
where T: InterruptNumber + Copy,

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unsafe fn enable(self)

Enable the interrupt.
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fn disable(self)

Disable the interrupt.
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fn is_active(self) -> bool

Check if interrupt is being handled.
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fn is_enabled(self) -> bool

Check if interrupt is enabled.
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fn is_pending(self) -> bool

Check if interrupt is pending.
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fn pend(self)

Set interrupt pending.
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fn unpend(self)

Unset interrupt pending.
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fn get_priority(self) -> Priority

Get the priority of the interrupt.
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fn set_priority(self, prio: Priority)

Set the interrupt priority.
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fn set_priority_with_cs(self, _cs: CriticalSection<'_>, prio: Priority)

Set the interrupt priority with an already-acquired critical section Read more
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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.