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Struct Peripherals

Source 
pub struct Peripherals {
Show 147 fields
    pub ADC1: ADC1,
    pub AES: AES,
    pub CRC: CRC,
    pub DBGMCU: DBGMCU,
    pub DMA1: DMA1,
    pub FLASH: FLASH,
    pub PA0: PA0,
    pub PA1: PA1,
    pub PA2: PA2,
    pub PA3: PA3,
    pub PA4: PA4,
    pub PA5: PA5,
    pub PA6: PA6,
    pub PA7: PA7,
    pub PA8: PA8,
    pub PA9: PA9,
    pub PA10: PA10,
    pub PA11: PA11,
    pub PA12: PA12,
    pub PA13: PA13,
    pub PA14: PA14,
    pub PA15: PA15,
    pub PB0: PB0,
    pub PB1: PB1,
    pub PB2: PB2,
    pub PB3: PB3,
    pub PB4: PB4,
    pub PB5: PB5,
    pub PB6: PB6,
    pub PB7: PB7,
    pub PB8: PB8,
    pub PB9: PB9,
    pub PB10: PB10,
    pub PB11: PB11,
    pub PB12: PB12,
    pub PB13: PB13,
    pub PB14: PB14,
    pub PB15: PB15,
    pub PC0: PC0,
    pub PC1: PC1,
    pub PC2: PC2,
    pub PC3: PC3,
    pub PC4: PC4,
    pub PC5: PC5,
    pub PC6: PC6,
    pub PC7: PC7,
    pub PC8: PC8,
    pub PC9: PC9,
    pub PC10: PC10,
    pub PC11: PC11,
    pub PC12: PC12,
    pub PC13: PC13,
    pub PC14: PC14,
    pub PC15: PC15,
    pub PD0: PD0,
    pub PD1: PD1,
    pub PD2: PD2,
    pub PD3: PD3,
    pub PD4: PD4,
    pub PD5: PD5,
    pub PD6: PD6,
    pub PD7: PD7,
    pub PD8: PD8,
    pub PD9: PD9,
    pub PD10: PD10,
    pub PD11: PD11,
    pub PD12: PD12,
    pub PD13: PD13,
    pub PD14: PD14,
    pub PD15: PD15,
    pub PE0: PE0,
    pub PE1: PE1,
    pub PE2: PE2,
    pub PE3: PE3,
    pub PE4: PE4,
    pub PE5: PE5,
    pub PE6: PE6,
    pub PE7: PE7,
    pub PE8: PE8,
    pub PE9: PE9,
    pub PE10: PE10,
    pub PE11: PE11,
    pub PE12: PE12,
    pub PE13: PE13,
    pub PE14: PE14,
    pub PE15: PE15,
    pub PH0: PH0,
    pub PH1: PH1,
    pub PH2: PH2,
    pub PH3: PH3,
    pub PH4: PH4,
    pub PH5: PH5,
    pub PH6: PH6,
    pub PH7: PH7,
    pub PH8: PH8,
    pub PH9: PH9,
    pub PH10: PH10,
    pub PH11: PH11,
    pub PH12: PH12,
    pub PH13: PH13,
    pub PH14: PH14,
    pub PH15: PH15,
    pub I2C1: I2C1,
    pub I2C3: I2C3,
    pub IWDG: IWDG,
    pub LPTIM1: LPTIM1,
    pub LPUART1: LPUART1,
    pub PWR: PWR,
    pub MCO: MCO,
    pub RCC: RCC,
    pub RTC: RTC,
    pub SPI1: SPI1,
    pub SYSCFG: SYSCFG,
    pub TIM2: TIM2,
    pub TIM21: TIM21,
    pub TIM3: TIM3,
    pub TIM6: TIM6,
    pub TIM7: TIM7,
    pub UID: UID,
    pub USART1: USART1,
    pub USART2: USART2,
    pub USART4: USART4,
    pub USART5: USART5,
    pub WWDG: WWDG,
    pub EXTI0: EXTI0,
    pub EXTI1: EXTI1,
    pub EXTI2: EXTI2,
    pub EXTI3: EXTI3,
    pub EXTI4: EXTI4,
    pub EXTI5: EXTI5,
    pub EXTI6: EXTI6,
    pub EXTI7: EXTI7,
    pub EXTI8: EXTI8,
    pub EXTI9: EXTI9,
    pub EXTI10: EXTI10,
    pub EXTI11: EXTI11,
    pub EXTI12: EXTI12,
    pub EXTI13: EXTI13,
    pub EXTI14: EXTI14,
    pub EXTI15: EXTI15,
    pub DMA1_CH1: DMA1_CH1,
    pub DMA1_CH2: DMA1_CH2,
    pub DMA1_CH3: DMA1_CH3,
    pub DMA1_CH4: DMA1_CH4,
    pub DMA1_CH5: DMA1_CH5,
    pub DMA1_CH6: DMA1_CH6,
    pub DMA1_CH7: DMA1_CH7,

}
Expand description

Struct containing all the peripheral singletons.

To obtain the peripherals, you must initialize the HAL, by calling crate::init.

Fields§

§ADC1: ADC1

ADC1 peripheral

§AES: AES

AES peripheral

§CRC: CRC

CRC peripheral

§DBGMCU: DBGMCU

DBGMCU peripheral

§DMA1: DMA1

DMA1 peripheral

§FLASH: FLASH

FLASH peripheral

§PA0: PA0

PA0 peripheral

§PA1: PA1

PA1 peripheral

§PA2: PA2

PA2 peripheral

§PA3: PA3

PA3 peripheral

§PA4: PA4

PA4 peripheral

§PA5: PA5

PA5 peripheral

§PA6: PA6

PA6 peripheral

§PA7: PA7

PA7 peripheral

§PA8: PA8

PA8 peripheral

§PA9: PA9

PA9 peripheral

§PA10: PA10

PA10 peripheral

§PA11: PA11

PA11 peripheral

§PA12: PA12

PA12 peripheral

§PA13: PA13

PA13 peripheral

§PA14: PA14

PA14 peripheral

§PA15: PA15

PA15 peripheral

§PB0: PB0

PB0 peripheral

§PB1: PB1

PB1 peripheral

§PB2: PB2

PB2 peripheral

§PB3: PB3

PB3 peripheral

§PB4: PB4

PB4 peripheral

§PB5: PB5

PB5 peripheral

§PB6: PB6

PB6 peripheral

§PB7: PB7

PB7 peripheral

§PB8: PB8

PB8 peripheral

§PB9: PB9

PB9 peripheral

§PB10: PB10

PB10 peripheral

§PB11: PB11

PB11 peripheral

§PB12: PB12

PB12 peripheral

§PB13: PB13

PB13 peripheral

§PB14: PB14

PB14 peripheral

§PB15: PB15

PB15 peripheral

§PC0: PC0

PC0 peripheral

§PC1: PC1

PC1 peripheral

§PC2: PC2

PC2 peripheral

§PC3: PC3

PC3 peripheral

§PC4: PC4

PC4 peripheral

§PC5: PC5

PC5 peripheral

§PC6: PC6

PC6 peripheral

§PC7: PC7

PC7 peripheral

§PC8: PC8

PC8 peripheral

§PC9: PC9

PC9 peripheral

§PC10: PC10

PC10 peripheral

§PC11: PC11

PC11 peripheral

§PC12: PC12

PC12 peripheral

§PC13: PC13

PC13 peripheral

§PC14: PC14

PC14 peripheral

§PC15: PC15

PC15 peripheral

§PD0: PD0

PD0 peripheral

§PD1: PD1

PD1 peripheral

§PD2: PD2

PD2 peripheral

§PD3: PD3

PD3 peripheral

§PD4: PD4

PD4 peripheral

§PD5: PD5

PD5 peripheral

§PD6: PD6

PD6 peripheral

§PD7: PD7

PD7 peripheral

§PD8: PD8

PD8 peripheral

§PD9: PD9

PD9 peripheral

§PD10: PD10

PD10 peripheral

§PD11: PD11

PD11 peripheral

§PD12: PD12

PD12 peripheral

§PD13: PD13

PD13 peripheral

§PD14: PD14

PD14 peripheral

§PD15: PD15

PD15 peripheral

§PE0: PE0

PE0 peripheral

§PE1: PE1

PE1 peripheral

§PE2: PE2

PE2 peripheral

§PE3: PE3

PE3 peripheral

§PE4: PE4

PE4 peripheral

§PE5: PE5

PE5 peripheral

§PE6: PE6

PE6 peripheral

§PE7: PE7

PE7 peripheral

§PE8: PE8

PE8 peripheral

§PE9: PE9

PE9 peripheral

§PE10: PE10

PE10 peripheral

§PE11: PE11

PE11 peripheral

§PE12: PE12

PE12 peripheral

§PE13: PE13

PE13 peripheral

§PE14: PE14

PE14 peripheral

§PE15: PE15

PE15 peripheral

§PH0: PH0

PH0 peripheral

§PH1: PH1

PH1 peripheral

§PH2: PH2

PH2 peripheral

§PH3: PH3

PH3 peripheral

§PH4: PH4

PH4 peripheral

§PH5: PH5

PH5 peripheral

§PH6: PH6

PH6 peripheral

§PH7: PH7

PH7 peripheral

§PH8: PH8

PH8 peripheral

§PH9: PH9

PH9 peripheral

§PH10: PH10

PH10 peripheral

§PH11: PH11

PH11 peripheral

§PH12: PH12

PH12 peripheral

§PH13: PH13

PH13 peripheral

§PH14: PH14

PH14 peripheral

§PH15: PH15

PH15 peripheral

§I2C1: I2C1

I2C1 peripheral

§I2C3: I2C3

I2C3 peripheral

§IWDG: IWDG

IWDG peripheral

§LPTIM1: LPTIM1

LPTIM1 peripheral

§LPUART1: LPUART1

LPUART1 peripheral

§PWR: PWR

PWR peripheral

§MCO: MCO

MCO peripheral

§RCC: RCC

RCC peripheral

§RTC: RTC

RTC peripheral

§SPI1: SPI1

SPI1 peripheral

§SYSCFG: SYSCFG

SYSCFG peripheral

§TIM2: TIM2

TIM2 peripheral

§TIM21: TIM21

TIM21 peripheral

§TIM3: TIM3

TIM3 peripheral

§TIM6: TIM6

TIM6 peripheral

§TIM7: TIM7

TIM7 peripheral

§UID: UID

UID peripheral

§USART1: USART1

USART1 peripheral

§USART2: USART2

USART2 peripheral

§USART4: USART4

USART4 peripheral

§USART5: USART5

USART5 peripheral

§WWDG: WWDG

WWDG peripheral

§EXTI0: EXTI0

EXTI0 peripheral

§EXTI1: EXTI1

EXTI1 peripheral

§EXTI2: EXTI2

EXTI2 peripheral

§EXTI3: EXTI3

EXTI3 peripheral

§EXTI4: EXTI4

EXTI4 peripheral

§EXTI5: EXTI5

EXTI5 peripheral

§EXTI6: EXTI6

EXTI6 peripheral

§EXTI7: EXTI7

EXTI7 peripheral

§EXTI8: EXTI8

EXTI8 peripheral

§EXTI9: EXTI9

EXTI9 peripheral

§EXTI10: EXTI10

EXTI10 peripheral

§EXTI11: EXTI11

EXTI11 peripheral

§EXTI12: EXTI12

EXTI12 peripheral

§EXTI13: EXTI13

EXTI13 peripheral

§EXTI14: EXTI14

EXTI14 peripheral

§EXTI15: EXTI15

EXTI15 peripheral

§DMA1_CH1: DMA1_CH1

DMA1_CH1 peripheral

§DMA1_CH2: DMA1_CH2

DMA1_CH2 peripheral

§DMA1_CH3: DMA1_CH3

DMA1_CH3 peripheral

§DMA1_CH4: DMA1_CH4

DMA1_CH4 peripheral

§DMA1_CH5: DMA1_CH5

DMA1_CH5 peripheral

§DMA1_CH6: DMA1_CH6

DMA1_CH6 peripheral

§DMA1_CH7: DMA1_CH7

DMA1_CH7 peripheral

Implementations§

Source§

impl Peripherals

Source

pub unsafe fn steal() -> Self

Unsafely create an instance of this peripheral out of thin air.

§Safety

You must ensure that you’re only using one instance of this type at a time.

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fn borrow_mut(&mut self) -> &mut T

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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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type Error = Infallible

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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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type Error = <U as TryFrom<T>>::Error

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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

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