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embassy_stm32

Struct Peripherals

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pub struct Peripherals {
Show 160 fields
    pub PA0: PA0,
    pub PA1: PA1,
    pub PA2: PA2,
    pub PA3: PA3,
    pub PA4: PA4,
    pub PA5: PA5,
    pub PA6: PA6,
    pub PA7: PA7,
    pub PA8: PA8,
    pub PA9: PA9,
    pub PA10: PA10,
    pub PA11: PA11,
    pub PA12: PA12,
    pub PA13: PA13,
    pub PA14: PA14,
    pub PA15: PA15,
    pub PB0: PB0,
    pub PB1: PB1,
    pub PB2: PB2,
    pub PB3: PB3,
    pub PB4: PB4,
    pub PB5: PB5,
    pub PB6: PB6,
    pub PB7: PB7,
    pub PB8: PB8,
    pub PB9: PB9,
    pub PB10: PB10,
    pub PB12: PB12,
    pub PB13: PB13,
    pub PB14: PB14,
    pub PB15: PB15,
    pub PC0: PC0,
    pub PC1: PC1,
    pub PC2: PC2,
    pub PC3: PC3,
    pub PC4: PC4,
    pub PC5: PC5,
    pub PC6: PC6,
    pub PC7: PC7,
    pub PC8: PC8,
    pub PC9: PC9,
    pub PC10: PC10,
    pub PC11: PC11,
    pub PC12: PC12,
    pub PC13: PC13,
    pub PC14: PC14,
    pub PC15: PC15,
    pub PD2: PD2,
    pub PH0: PH0,
    pub PH1: PH1,
    pub PH3: PH3,
    pub ADC1: ADC1,
    pub ADC12_COMMON: ADC12_COMMON,
    pub ADC2: ADC2,
    pub ADC4: ADC4,
    pub ADC4_COMMON: ADC4_COMMON,
    pub ADF1: ADF1,
    pub COMP1: COMP1,
    pub COMP2: COMP2,
    pub CORDIC: CORDIC,
    pub CRC: CRC,
    pub CRS: CRS,
    pub DAC1: DAC1,
    pub DBGMCU: DBGMCU,
    pub DCACHE1: DCACHE1,
    pub DCMI: DCMI,
    pub DMA2D: DMA2D,
    pub FDCAN1: FDCAN1,
    pub FDCANRAM1: FDCANRAM1,
    pub FLASH: FLASH,
    pub FMAC: FMAC,
    pub GPDMA1: GPDMA1,
    pub HASH: HASH,
    pub I2C1: I2C1,
    pub I2C2: I2C2,
    pub I2C3: I2C3,
    pub I2C4: I2C4,
    pub ICACHE: ICACHE,
    pub IWDG: IWDG,
    pub LPDMA1: LPDMA1,
    pub LPTIM1: LPTIM1,
    pub LPTIM2: LPTIM2,
    pub LPTIM3: LPTIM3,
    pub LPTIM4: LPTIM4,
    pub LPUART1: LPUART1,
    pub OCTOSPI1: OCTOSPI1,
    pub OCTOSPI2: OCTOSPI2,
    pub OCTOSPIM: OCTOSPIM,
    pub PSSI: PSSI,
    pub PWR: PWR,
    pub MCO: MCO,
    pub RCC: RCC,
    pub RNG: RNG,
    pub RTC: RTC,
    pub SAI1: SAI1,
    pub SDMMC1: SDMMC1,
    pub SDMMC2: SDMMC2,
    pub SPI1: SPI1,
    pub SPI2: SPI2,
    pub SPI3: SPI3,
    pub SYSCFG: SYSCFG,
    pub TAMP: TAMP,
    pub TIM1: TIM1,
    pub TIM16: TIM16,
    pub TIM17: TIM17,
    pub TIM2: TIM2,
    pub TIM3: TIM3,
    pub TIM4: TIM4,
    pub TIM5: TIM5,
    pub TIM6: TIM6,
    pub TIM7: TIM7,
    pub TIM8: TIM8,
    pub TSC: TSC,
    pub UART4: UART4,
    pub UART5: UART5,
    pub UCPD1: UCPD1,
    pub UID: UID,
    pub USART1: USART1,
    pub USART2: USART2,
    pub USART3: USART3,
    pub USART6: USART6,
    pub USB_OTG_HS: USB_OTG_HS,
    pub VREFBUF: VREFBUF,
    pub WWDG: WWDG,
    pub EXTI0: EXTI0,
    pub EXTI1: EXTI1,
    pub EXTI2: EXTI2,
    pub EXTI3: EXTI3,
    pub EXTI4: EXTI4,
    pub EXTI5: EXTI5,
    pub EXTI6: EXTI6,
    pub EXTI7: EXTI7,
    pub EXTI8: EXTI8,
    pub EXTI9: EXTI9,
    pub EXTI10: EXTI10,
    pub EXTI11: EXTI11,
    pub EXTI12: EXTI12,
    pub EXTI13: EXTI13,
    pub EXTI14: EXTI14,
    pub EXTI15: EXTI15,
    pub LPDMA1_CH0: LPDMA1_CH0,
    pub LPDMA1_CH1: LPDMA1_CH1,
    pub LPDMA1_CH2: LPDMA1_CH2,
    pub LPDMA1_CH3: LPDMA1_CH3,
    pub GPDMA1_CH0: GPDMA1_CH0,
    pub GPDMA1_CH1: GPDMA1_CH1,
    pub GPDMA1_CH2: GPDMA1_CH2,
    pub GPDMA1_CH3: GPDMA1_CH3,
    pub GPDMA1_CH4: GPDMA1_CH4,
    pub GPDMA1_CH5: GPDMA1_CH5,
    pub GPDMA1_CH6: GPDMA1_CH6,
    pub GPDMA1_CH7: GPDMA1_CH7,
    pub GPDMA1_CH8: GPDMA1_CH8,
    pub GPDMA1_CH9: GPDMA1_CH9,
    pub GPDMA1_CH10: GPDMA1_CH10,
    pub GPDMA1_CH11: GPDMA1_CH11,
    pub GPDMA1_CH12: GPDMA1_CH12,
    pub GPDMA1_CH13: GPDMA1_CH13,
    pub GPDMA1_CH14: GPDMA1_CH14,
    pub GPDMA1_CH15: GPDMA1_CH15,

}
Expand description

Struct containing all the peripheral singletons.

To obtain the peripherals, you must initialize the HAL, by calling crate::init.

Fields§

§PA0: PA0

PA0 peripheral

§PA1: PA1

PA1 peripheral

§PA2: PA2

PA2 peripheral

§PA3: PA3

PA3 peripheral

§PA4: PA4

PA4 peripheral

§PA5: PA5

PA5 peripheral

§PA6: PA6

PA6 peripheral

§PA7: PA7

PA7 peripheral

§PA8: PA8

PA8 peripheral

§PA9: PA9

PA9 peripheral

§PA10: PA10

PA10 peripheral

§PA11: PA11

PA11 peripheral

§PA12: PA12

PA12 peripheral

§PA13: PA13

PA13 peripheral

§PA14: PA14

PA14 peripheral

§PA15: PA15

PA15 peripheral

§PB0: PB0

PB0 peripheral

§PB1: PB1

PB1 peripheral

§PB2: PB2

PB2 peripheral

§PB3: PB3

PB3 peripheral

§PB4: PB4

PB4 peripheral

§PB5: PB5

PB5 peripheral

§PB6: PB6

PB6 peripheral

§PB7: PB7

PB7 peripheral

§PB8: PB8

PB8 peripheral

§PB9: PB9

PB9 peripheral

§PB10: PB10

PB10 peripheral

§PB12: PB12

PB12 peripheral

§PB13: PB13

PB13 peripheral

§PB14: PB14

PB14 peripheral

§PB15: PB15

PB15 peripheral

§PC0: PC0

PC0 peripheral

§PC1: PC1

PC1 peripheral

§PC2: PC2

PC2 peripheral

§PC3: PC3

PC3 peripheral

§PC4: PC4

PC4 peripheral

§PC5: PC5

PC5 peripheral

§PC6: PC6

PC6 peripheral

§PC7: PC7

PC7 peripheral

§PC8: PC8

PC8 peripheral

§PC9: PC9

PC9 peripheral

§PC10: PC10

PC10 peripheral

§PC11: PC11

PC11 peripheral

§PC12: PC12

PC12 peripheral

§PC13: PC13

PC13 peripheral

§PC14: PC14

PC14 peripheral

§PC15: PC15

PC15 peripheral

§PD2: PD2

PD2 peripheral

§PH0: PH0

PH0 peripheral

§PH1: PH1

PH1 peripheral

§PH3: PH3

PH3 peripheral

§ADC1: ADC1

ADC1 peripheral

§ADC12_COMMON: ADC12_COMMON

ADC12_COMMON peripheral

§ADC2: ADC2

ADC2 peripheral

§ADC4: ADC4

ADC4 peripheral

§ADC4_COMMON: ADC4_COMMON

ADC4_COMMON peripheral

§ADF1: ADF1

ADF1 peripheral

§COMP1: COMP1

COMP1 peripheral

§COMP2: COMP2

COMP2 peripheral

§CORDIC: CORDIC

CORDIC peripheral

§CRC: CRC

CRC peripheral

§CRS: CRS

CRS peripheral

§DAC1: DAC1

DAC1 peripheral

§DBGMCU: DBGMCU

DBGMCU peripheral

§DCACHE1: DCACHE1

DCACHE1 peripheral

§DCMI: DCMI

DCMI peripheral

§DMA2D: DMA2D

DMA2D peripheral

§FDCAN1: FDCAN1

FDCAN1 peripheral

§FDCANRAM1: FDCANRAM1

FDCANRAM1 peripheral

§FLASH: FLASH

FLASH peripheral

§FMAC: FMAC

FMAC peripheral

§GPDMA1: GPDMA1

GPDMA1 peripheral

§HASH: HASH

HASH peripheral

§I2C1: I2C1

I2C1 peripheral

§I2C2: I2C2

I2C2 peripheral

§I2C3: I2C3

I2C3 peripheral

§I2C4: I2C4

I2C4 peripheral

§ICACHE: ICACHE

ICACHE peripheral

§IWDG: IWDG

IWDG peripheral

§LPDMA1: LPDMA1

LPDMA1 peripheral

§LPTIM1: LPTIM1

LPTIM1 peripheral

§LPTIM2: LPTIM2

LPTIM2 peripheral

§LPTIM3: LPTIM3

LPTIM3 peripheral

§LPTIM4: LPTIM4

LPTIM4 peripheral

§LPUART1: LPUART1

LPUART1 peripheral

§OCTOSPI1: OCTOSPI1

OCTOSPI1 peripheral

§OCTOSPI2: OCTOSPI2

OCTOSPI2 peripheral

§OCTOSPIM: OCTOSPIM

OCTOSPIM peripheral

§PSSI: PSSI

PSSI peripheral

§PWR: PWR

PWR peripheral

§MCO: MCO

MCO peripheral

§RCC: RCC

RCC peripheral

§RNG: RNG

RNG peripheral

§RTC: RTC

RTC peripheral

§SAI1: SAI1

SAI1 peripheral

§SDMMC1: SDMMC1

SDMMC1 peripheral

§SDMMC2: SDMMC2

SDMMC2 peripheral

§SPI1: SPI1

SPI1 peripheral

§SPI2: SPI2

SPI2 peripheral

§SPI3: SPI3

SPI3 peripheral

§SYSCFG: SYSCFG

SYSCFG peripheral

§TAMP: TAMP

TAMP peripheral

§TIM1: TIM1

TIM1 peripheral

§TIM16: TIM16

TIM16 peripheral

§TIM17: TIM17

TIM17 peripheral

§TIM2: TIM2

TIM2 peripheral

§TIM3: TIM3

TIM3 peripheral

§TIM4: TIM4

TIM4 peripheral

§TIM5: TIM5

TIM5 peripheral

§TIM6: TIM6

TIM6 peripheral

§TIM7: TIM7

TIM7 peripheral

§TIM8: TIM8

TIM8 peripheral

§TSC: TSC

TSC peripheral

§UART4: UART4

UART4 peripheral

§UART5: UART5

UART5 peripheral

§UCPD1: UCPD1

UCPD1 peripheral

§UID: UID

UID peripheral

§USART1: USART1

USART1 peripheral

§USART2: USART2

USART2 peripheral

§USART3: USART3

USART3 peripheral

§USART6: USART6

USART6 peripheral

§USB_OTG_HS: USB_OTG_HS

USB_OTG_HS peripheral

§VREFBUF: VREFBUF

VREFBUF peripheral

§WWDG: WWDG

WWDG peripheral

§EXTI0: EXTI0

EXTI0 peripheral

§EXTI1: EXTI1

EXTI1 peripheral

§EXTI2: EXTI2

EXTI2 peripheral

§EXTI3: EXTI3

EXTI3 peripheral

§EXTI4: EXTI4

EXTI4 peripheral

§EXTI5: EXTI5

EXTI5 peripheral

§EXTI6: EXTI6

EXTI6 peripheral

§EXTI7: EXTI7

EXTI7 peripheral

§EXTI8: EXTI8

EXTI8 peripheral

§EXTI9: EXTI9

EXTI9 peripheral

§EXTI10: EXTI10

EXTI10 peripheral

§EXTI11: EXTI11

EXTI11 peripheral

§EXTI12: EXTI12

EXTI12 peripheral

§EXTI13: EXTI13

EXTI13 peripheral

§EXTI14: EXTI14

EXTI14 peripheral

§EXTI15: EXTI15

EXTI15 peripheral

§LPDMA1_CH0: LPDMA1_CH0

LPDMA1_CH0 peripheral

§LPDMA1_CH1: LPDMA1_CH1

LPDMA1_CH1 peripheral

§LPDMA1_CH2: LPDMA1_CH2

LPDMA1_CH2 peripheral

§LPDMA1_CH3: LPDMA1_CH3

LPDMA1_CH3 peripheral

§GPDMA1_CH0: GPDMA1_CH0

GPDMA1_CH0 peripheral

§GPDMA1_CH1: GPDMA1_CH1

GPDMA1_CH1 peripheral

§GPDMA1_CH2: GPDMA1_CH2

GPDMA1_CH2 peripheral

§GPDMA1_CH3: GPDMA1_CH3

GPDMA1_CH3 peripheral

§GPDMA1_CH4: GPDMA1_CH4

GPDMA1_CH4 peripheral

§GPDMA1_CH5: GPDMA1_CH5

GPDMA1_CH5 peripheral

§GPDMA1_CH6: GPDMA1_CH6

GPDMA1_CH6 peripheral

§GPDMA1_CH7: GPDMA1_CH7

GPDMA1_CH7 peripheral

§GPDMA1_CH8: GPDMA1_CH8

GPDMA1_CH8 peripheral

§GPDMA1_CH9: GPDMA1_CH9

GPDMA1_CH9 peripheral

§GPDMA1_CH10: GPDMA1_CH10

GPDMA1_CH10 peripheral

§GPDMA1_CH11: GPDMA1_CH11

GPDMA1_CH11 peripheral

§GPDMA1_CH12: GPDMA1_CH12

GPDMA1_CH12 peripheral

§GPDMA1_CH13: GPDMA1_CH13

GPDMA1_CH13 peripheral

§GPDMA1_CH14: GPDMA1_CH14

GPDMA1_CH14 peripheral

§GPDMA1_CH15: GPDMA1_CH15

GPDMA1_CH15 peripheral

Implementations§

Source§

impl Peripherals

Source

pub unsafe fn steal() -> Self

Unsafely create an instance of this peripheral out of thin air.

§Safety

You must ensure that you’re only using one instance of this type at a time.

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fn borrow_mut(&mut self) -> &mut T

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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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fn into(self) -> U

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That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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type Error = Infallible

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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

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type Error = <U as TryFrom<T>>::Error

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