Struct Cordic

Source

pub struct Cordic<'d, T: Instance> { /* private fields */ }

Expand description

CORDIC driver

Implementations§

Source §

impl<'d, T: Instance> Cordic<'d, T>

Source

pub fn new(peri: Peri<'d, T>, config: Config) -> Self

Create a Cordic driver instance

Source

pub fn set_config(&mut self, config: Config)

Set a new config for Cordic driver.

This calls Self::reconfigure, which resets ARG2 to +1. To change only arg_count/res_count without resetting ARG2, use Self::set_access_counts instead.

Source

pub fn set_access_counts( &mut self, arg_count: AccessCount, res_count: AccessCount, )

Change arg_count and res_count without resetting ARG2.

This is a lightweight CSR update for switching between 1-arg and 2-arg modes within the same function configuration (e.g. after an initial 2-arg call sets ARG2, switch to 1-arg mode for the hot loop).

Source

pub fn reconfigure(&mut self)

Disable IRQ and DMA, clean RRDY, and set ARG2 to +1 (0x7FFFFFFF)

Source §

impl<'d, T: Instance> Cordic<'d, T>

Source

pub fn blocking_calc_32bit( &mut self, arg: &[u32], res: &mut [u32], ) -> Result<usize, CordicError>

Run a blocking CORDIC calculation in q1.31 format.

Uses arg_count and res_count from the current Config. If arg_count is One, ARG2 must have been set to the desired value beforehand (e.g. via a prior Two-arg call or Self::reconfigure).

Source

pub async fn async_calc_32bit<'a, W, R>( &mut self, write_dma: Peri<'a, W>, read_dma: Peri<'a, R>, irq: impl Binding<W::Interrupt, InterruptHandler<W>> + Binding<R::Interrupt, InterruptHandler<R>> + 'a, arg: &[u32], res: &mut [u32], ) -> Result<usize, CordicError>
where W: WriteDma<T>, R: ReadDma<T>,

Run an async CORDIC calculation in q1.31 format.

Uses arg_count and res_count from the current Config. If arg_count is One, ARG2 must have been set to the desired value beforehand (e.g. via a prior Two-arg call or Self::reconfigure).

Source §

impl<'d, T: Instance> Cordic<'d, T>

Source

pub fn blocking_calc_16bit( &mut self, arg: &[u32], res: &mut [u32], ) -> Result<usize, CordicError>

Run a blocking CORDIC calculation in q1.15 format.

In q1.15 mode, each WDATA write / RDATA read contains two packed 16-bit values, so nargs and nres are always 1 (one register access = two values).

After this call, the CSR is restored to the 32-bit state from the current Config.

Source

pub async fn async_calc_16bit<'a, W, R>( &mut self, write_dma: Peri<'a, W>, read_dma: Peri<'a, R>, irq: impl Binding<W::Interrupt, InterruptHandler<W>> + Binding<R::Interrupt, InterruptHandler<R>> + 'a, arg: &[u32], res: &mut [u32], ) -> Result<usize, CordicError>
where W: WriteDma<T>, R: ReadDma<T>,

Run an async CORDIC calculation in q1.15 format.

In q1.15 mode, each WDATA write / RDATA read contains two packed 16-bit values, so nargs and nres are always 1 (one register access = two values).

After this call, the CSR is restored to the 32-bit state from the current Config.

Source §