pub struct TransceiverBuilder<T, M, C, S, SN>{ /* private fields */ }Expand description
Builder for a Transceiver; declare pins, then call a build_* to finish.
Implementations§
Source§impl<T, M, C, S, SN> TransceiverBuilder<T, M, C, S, SN>where
T: Instance,
M: TransceiverMarker + NextChannelForInstance<T>,
C: ClockOutputMode,
S: PinSet,
SN: PinSet,
impl<T, M, C, S, SN> TransceiverBuilder<T, M, C, S, SN>where
T: Instance,
M: TransceiverMarker + NextChannelForInstance<T>,
C: ClockOutputMode,
S: PinSet,
SN: PinSet,
Sourcepub fn build_parallel_adc<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
) -> Transceiver<'a, 'd, T, M, S, ParallelAdcMode, OwnPins, Disabled>where
T: AdcInput,
pub fn build_parallel_adc<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
) -> Transceiver<'a, 'd, T, M, S, ParallelAdcMode, OwnPins, Disabled>where
T: AdcInput,
Parallel input from ADC writes to CHyDATINR (DATMPX=1). No CKOUT, no pins needed. Serial pins declared on this transceiver are disconnected (the builder’s Flexes drop here - they’re unused in this mode).
The ADC must also be configured to route its results to the DFSDM; use
crate::adc::Adc::start_dfsdm.
Sourcepub fn build_parallel_standard<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
) -> Transceiver<'a, 'd, T, M, S, ParallelStandard, OwnPins, Disabled>
pub fn build_parallel_standard<'a, 'd>( self, common: &'a DfsdmCommon<'d, T, Enabled>, ) -> Transceiver<'a, 'd, T, M, S, ParallelStandard, OwnPins, Disabled>
Parallel input from CPU/DMA writes to CHyDATINR (DATMPX = 2), Standard packing. No CKOUT, no pins needed; serial pins declared on this transceiver are disconnected (the builder’s Flexes drop here).
Sourcepub fn build_parallel_interleaved<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
) -> Transceiver<'a, 'd, T, M, S, ParallelInterleaved, OwnPins, Disabled>
pub fn build_parallel_interleaved<'a, 'd>( self, common: &'a DfsdmCommon<'d, T, Enabled>, ) -> Transceiver<'a, 'd, T, M, S, ParallelInterleaved, OwnPins, Disabled>
Parallel input from CPU/DMA writes to CHyDATINR (DATMPX = 2), Interleaved packing. No CKOUT, no pins needed; serial pins declared on this transceiver are disconnected (the builder’s Flexes drop here).
Sourcepub fn build_parallel_dual<'a, 'd, MN, SNN>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
neighbor: TransceiverBuilder<T, MN, C, SN, SNN>,
) -> ParallelPairDisabled<'a, 'd, T, M, S, MN, SN>where
M: DualPackingAllowed + NextChannelForInstance<T, Next = MN>,
MN: TransceiverMarker + NextChannelForInstance<T>,
SNN: PinSet,
pub fn build_parallel_dual<'a, 'd, MN, SNN>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
neighbor: TransceiverBuilder<T, MN, C, SN, SNN>,
) -> ParallelPairDisabled<'a, 'd, T, M, S, MN, SN>where
M: DualPackingAllowed + NextChannelForInstance<T, Next = MN>,
MN: TransceiverMarker + NextChannelForInstance<T>,
SNN: PinSet,
Create a dual-mode parallel-input pair.
Returns a disabled ParallelPairDisabled: the even transceiver M
(Dual packing, owns the DATINR register) and the odd neighbor MN
(Standard packing). Configure it, then ParallelPairDisabled::enable;
feed both samples via ParallelPair::write (INDAT0 goes to channel
y, INDAT1 is copied by the hardware into channel y + 1).
Two filters must be configured - one on M (reads INDAT0) and one on
MN (reads the copied INDAT0) - or the register won’t drain and you’ll
get overrun errors.
Sourcepub fn build_manchester<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: ManchesterMode,
) -> Transceiver<'a, 'd, T, M, S, ManchesterMode, OwnPins, Disabled>where
S: HasData,
pub fn build_manchester<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: ManchesterMode,
) -> Transceiver<'a, 'd, T, M, S, ManchesterMode, OwnPins, Disabled>where
S: HasData,
Manchester-coded input over this transceiver’s own DATIN pin (SITP = 2/3,
DATMPX = 0). The clock is recovered from the data line, so CKOUT/CKIN
are not needed; the declared DATIN pin carries data and clock.
mode chooses the Manchester polarity (rising edge = 0 or 1).
Sourcepub fn build_manchester_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: ManchesterMode,
) -> Result<Transceiver<'a, 'd, T, M, DataOnly, ManchesterMode, NeighborPins, Disabled>, Error>where
SN: HasData,
pub fn build_manchester_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: ManchesterMode,
) -> Result<Transceiver<'a, 'd, T, M, DataOnly, ManchesterMode, NeighborPins, Disabled>, Error>where
SN: HasData,
Same as Self::build_manchester, but using the neighbor’s pins.
Sourcepub fn build_spi_ext<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: SpiMode,
) -> Transceiver<'a, 'd, T, M, S, SpiExtMode, OwnPins, Disabled>where
S: HasDataAndClk,
pub fn build_spi_ext<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: SpiMode,
) -> Transceiver<'a, 'd, T, M, S, SpiExtMode, OwnPins, Disabled>where
S: HasDataAndClk,
SPI input over this transceiver’s own pins (DATMPX=0, SPICKSEL=0): sampling
clock comes from the external CKIN pin; requires a DataClk pinset
(both lines). mode chooses rising/falling-edge sampling (SITP 0/1).
Sourcepub fn build_spi_ext_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: SpiMode,
) -> Result<Transceiver<'a, 'd, T, M, DataClk, SpiExtMode, NeighborPins, Disabled>, Error>where
SN: HasDataAndClk,
pub fn build_spi_ext_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: SpiMode,
) -> Result<Transceiver<'a, 'd, T, M, DataClk, SpiExtMode, NeighborPins, Disabled>, Error>where
SN: HasDataAndClk,
Same as Self::build_spi_ext, but using the neighbor’s pins.
Source§impl<T, M, S, SN> TransceiverBuilder<T, M, OutputEnabled, S, SN>
impl<T, M, S, SN> TransceiverBuilder<T, M, OutputEnabled, S, SN>
Sourcepub fn build_spi_int<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: InternalSpiMode,
) -> Transceiver<'a, 'd, T, M, S, SpiCkoutMode, OwnPins, Disabled>where
S: HasData,
pub fn build_spi_int<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: InternalSpiMode,
) -> Transceiver<'a, 'd, T, M, S, SpiCkoutMode, OwnPins, Disabled>where
S: HasData,
SPI input over this transceiver’s own DATIN pin (DATMPX=0), clock supplied
by our own CKOUT - only meaningful with OutputEnabled
(InternalSpiMode picks rising/falling or the half-rate edges).
Sourcepub fn build_spi_int_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: InternalSpiMode,
) -> Result<Transceiver<'a, 'd, T, M, DataOnly, SpiCkoutMode, NeighborPins, Disabled>, Error>where
SN: HasData,
pub fn build_spi_int_neighbor<'a, 'd>(
self,
common: &'a DfsdmCommon<'d, T, Enabled>,
mode: InternalSpiMode,
) -> Result<Transceiver<'a, 'd, T, M, DataOnly, SpiCkoutMode, NeighborPins, Disabled>, Error>where
SN: HasData,
Same as Self::build_spi_int, but using the neighbor’s pins.