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mcxn947_cm33_core0

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Inputmux0

nxp_pac::inputmux0

Struct Inputmux0 

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pub struct Inputmux0 { /* private fields */ }
Expand description

INPUTMUX.

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impl Inputmux0

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pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

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pub const fn as_ptr(&self) -> *mut ()

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pub const fn sct0_inmux(self, n: usize) -> Reg<Sct0Inmux, RW>

Inputmux Register for SCT0 Input.

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pub const fn ctimer0cap0(self) -> Reg<Ctimer0cap0, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer0cap1(self) -> Reg<Ctimer0cap1, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer0cap2(self) -> Reg<Ctimer0cap2, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer0cap3(self) -> Reg<Ctimer0cap3, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn timer0trig(self) -> Reg<Timer0trig, RW>

Trigger Register for CTIMER.

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pub const fn ctimer1cap0(self) -> Reg<Ctimer1cap0, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer1cap1(self) -> Reg<Ctimer1cap1, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer1cap2(self) -> Reg<Ctimer1cap2, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer1cap3(self) -> Reg<Ctimer1cap3, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn timer1trig(self) -> Reg<Timer1trig, RW>

Trigger Register for CTIMER.

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pub const fn ctimer2cap0(self) -> Reg<Ctimer2cap0, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer2cap1(self) -> Reg<Ctimer2cap1, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer2cap2(self) -> Reg<Ctimer2cap2, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer2cap3(self) -> Reg<Ctimer2cap3, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn timer2trig(self) -> Reg<Timer2trig, RW>

Trigger Register for CTIMER.

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pub const fn smartdmaarchb_inmux(self, n: usize) -> Reg<SmartdmaarchbInmux, RW>

Inputmux Register for SMARTDMA Arch B Inputs.

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pub const fn pintsel(self, n: usize) -> Reg<Pintsel, RW>

Pin Interrupt Select.

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pub const fn freqmeas_ref(self) -> Reg<FreqmeasRef, RW>

Selection for Frequency Measurement Reference Clock.

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pub const fn freqmeas_tar(self) -> Reg<FreqmeasTar, RW>

Selection for Frequency Measurement Target Clock.

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pub const fn ctimer3cap0(self) -> Reg<Ctimer3cap0, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer3cap1(self) -> Reg<Ctimer3cap1, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer3cap2(self) -> Reg<Ctimer3cap2, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer3cap3(self) -> Reg<Ctimer3cap3, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn timer3trig(self) -> Reg<Timer3trig, RW>

Trigger Register for CTIMER.

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pub const fn ctimer4cap0(self) -> Reg<Ctimer4cap0, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer4cap1(self) -> Reg<Ctimer4cap1, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer4cap2(self) -> Reg<Ctimer4cap2, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn ctimer4cap3(self) -> Reg<Ctimer4cap3, RW>

Capture Select Register for CTIMER Inputs.

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pub const fn timer4trig(self) -> Reg<Timer4trig, RW>

Trigger Register for CTIMER.

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pub const fn cmp0_trig(self) -> Reg<Cmp0Trig, RW>

CMP0 Input Connections.

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pub const fn adc0_trig(self, n: usize) -> Reg<Adc0Trig, RW>

ADC Trigger Input Connections.

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pub const fn adc1_trig(self, n: usize) -> Reg<Adc1Trig, RW>

ADC Trigger Input Connections.

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pub const fn dac0_trig(self) -> Reg<Dac0Trig, RW>

DAC0 Trigger Inputs.

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pub const fn dac1_trig(self) -> Reg<Dac1Trig, RW>

DAC1 Trigger Inputs.

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pub const fn dac2_trig(self) -> Reg<Dac2Trig, RW>

DAC2 Trigger Inputs.

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pub const fn qdc0_trig(self) -> Reg<Qdc0Trig, RW>

QDC0 Trigger Input Connections.

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pub const fn qdc0_home(self) -> Reg<Qdc0Home, RW>

QDC0 Input Connections.

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pub const fn qdc0_index(self) -> Reg<Qdc0Index, RW>

QDC0 Input Connections.

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pub const fn qdc0_phaseb(self) -> Reg<Qdc0Phaseb, RW>

QDC0 Input Connections.

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pub const fn qdc0_phasea(self) -> Reg<Qdc0Phasea, RW>

QDC0 Input Connections.

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pub const fn qdc1_trig(self) -> Reg<Qdc1Trig, RW>

QDC1 Trigger Input Connections.

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pub const fn qdc1_home(self) -> Reg<Qdc1Home, RW>

QDC1 Input Connections.

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pub const fn qdc1_index(self) -> Reg<Qdc1Index, RW>

QDC1 Input Connections.

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pub const fn qdc1_phaseb(self) -> Reg<Qdc1Phaseb, RW>

QDC1 Input Connections.

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pub const fn qdc1_phasea(self) -> Reg<Qdc1Phasea, RW>

QDC1 Input Connections.

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pub const fn flex_pwm0_sm_extsync(self, n: usize) -> Reg<FlexPwm0SmExtsync, RW>

PWM0 External Synchronization.

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pub const fn flex_pwm0_sm_exta(self, n: usize) -> Reg<FlexPwm0SmExta, RW>

PWM0 Input Trigger Connections.

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pub const fn flex_pwm0_extforce(self) -> Reg<FlexPwm0Extforce, RW>

PWM0 External Force Trigger Connections.

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pub const fn flex_pwm0_fault(self, n: usize) -> Reg<FlexPwm0Fault, RW>

PWM0 Fault Input Trigger Connections.

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pub const fn flex_pwm1_sm_extsync(self, n: usize) -> Reg<FlexPwm1SmExtsync, RW>

PWM1 External Synchronization.

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pub const fn flex_pwm1_sm_exta(self, n: usize) -> Reg<FlexPwm1SmExta, RW>

PWM1 Input EXTA Connections.

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pub const fn flex_pwm1_extforce(self) -> Reg<FlexPwm1Extforce, RW>

PWM1 External Force Trigger Connections.

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pub const fn flex_pwm1_fault(self, n: usize) -> Reg<FlexPwm1Fault, RW>

PWM1 Fault Input Trigger Connections.

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pub const fn pwm0_ext_clk(self) -> Reg<Pwm0ExtClk, RW>

PWM0 External Clock Trigger.

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pub const fn pwm1_ext_clk(self) -> Reg<Pwm1ExtClk, RW>

PWM1 External Clock Trigger.

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pub const fn evtg_trig0(self) -> Reg<EvtgTrig0, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig1(self) -> Reg<EvtgTrig1, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig2(self) -> Reg<EvtgTrig2, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig3(self) -> Reg<EvtgTrig3, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig4(self) -> Reg<EvtgTrig4, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig5(self) -> Reg<EvtgTrig5, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig6(self) -> Reg<EvtgTrig6, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig7(self) -> Reg<EvtgTrig7, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig8(self) -> Reg<EvtgTrig8, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig9(self) -> Reg<EvtgTrig9, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig10(self) -> Reg<EvtgTrig10, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig11(self) -> Reg<EvtgTrig11, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig12(self) -> Reg<EvtgTrig12, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig13(self) -> Reg<EvtgTrig13, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig14(self) -> Reg<EvtgTrig14, RW>

EVTG Trigger Input Connections.

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pub const fn evtg_trig15(self) -> Reg<EvtgTrig15, RW>

EVTG Trigger Input Connections.

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pub const fn usbfs_trig(self) -> Reg<UsbfsTrig, RW>

USB-FS Trigger Input Connections.

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pub const fn tsi_trig(self) -> Reg<TsiTrig, RW>

TSI Trigger Input Connections.

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pub const fn ext_trig0(self) -> Reg<ExtTrig0, RW>

EXT Trigger Connections.

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pub const fn ext_trig1(self) -> Reg<ExtTrig1, RW>

EXT Trigger Connections.

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pub const fn ext_trig2(self) -> Reg<ExtTrig2, RW>

EXT Trigger Connections.

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pub const fn ext_trig3(self) -> Reg<ExtTrig3, RW>

EXT Trigger Connections.

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pub const fn ext_trig4(self) -> Reg<ExtTrig4, RW>

EXT Trigger Connections.

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pub const fn ext_trig5(self) -> Reg<ExtTrig5, RW>

EXT Trigger Connections.

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pub const fn ext_trig6(self) -> Reg<ExtTrig6, RW>

EXT Trigger Connections.

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pub const fn ext_trig7(self) -> Reg<ExtTrig7, RW>

EXT Trigger Connections.

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pub const fn cmp1_trig(self) -> Reg<Cmp1Trig, RW>

CMP1 Input Connections.

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pub const fn cmp2_trig(self) -> Reg<Cmp2Trig, RW>

CMP2 Input Connections.

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pub const fn sinc_filter_ch0(self) -> Reg<SincFilterCh0, RW>

SINC Filter Channel Trigger Input Connections.

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pub const fn sinc_filter_ch1(self) -> Reg<SincFilterCh1, RW>

SINC Filter Channel Trigger Input Connections.

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pub const fn sinc_filter_ch2(self) -> Reg<SincFilterCh2, RW>

SINC Filter Channel Trigger Input Connections.

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pub const fn sinc_filter_ch3(self) -> Reg<SincFilterCh3, RW>

SINC Filter Channel Trigger Input Connections.

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pub const fn sinc_filter_ch4(self) -> Reg<SincFilterCh4, RW>

SINC Filter Channel Trigger Input Connections.

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pub const fn opamp0_trig(self) -> Reg<Opamp0Trig, RW>

OPAMP Trigger Input Connections.

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pub const fn opamp1_trig(self) -> Reg<Opamp1Trig, RW>

OPAMP Trigger Input Connections.

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pub const fn opamp2_trig(self) -> Reg<Opamp2Trig, RW>

OPAMP Trigger Input Connections.

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pub const fn flexcomm0_trig(self) -> Reg<Flexcomm0Trig, RW>

LP_FLEXCOMM0 Trigger Input Connections.

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pub const fn flexcomm1_trig(self) -> Reg<Flexcomm1Trig, RW>

LP_FLEXCOMM1 Trigger Input Connections.

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pub const fn flexcomm2_trig(self) -> Reg<Flexcomm2Trig, RW>

LP_FLEXCOMM2 Trigger Input Connections.

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pub const fn flexcomm3_trig(self) -> Reg<Flexcomm3Trig, RW>

LP_FLEXCOMM3 Trigger Input Connections.

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pub const fn flexcomm4_trig(self) -> Reg<Flexcomm4Trig, RW>

LP_FLEXCOMM4 Trigger Input Connections.

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pub const fn flexcomm5_trig(self) -> Reg<Flexcomm5Trig, RW>

LP_FLEXCOMM5 Trigger Input Connections.

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pub const fn flexcomm6_trig(self) -> Reg<Flexcomm6Trig, RW>

LP_FLEXCOMM6 Trigger Input Connections.

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pub const fn flexcomm7_trig(self) -> Reg<Flexcomm7Trig, RW>

LP_FLEXCOMM7 Trigger Input Connections.

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pub const fn flexcomm8_trig(self) -> Reg<Flexcomm8Trig, RW>

LP_FLEXCOMM8 Trigger Input Connections.

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pub const fn flexcomm9_trig(self) -> Reg<Flexcomm9Trig, RW>

LP_FLEXCOMM9 Trigger Input Connections.

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pub const fn flexio_trig0(self) -> Reg<FlexioTrig0, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig1(self) -> Reg<FlexioTrig1, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig2(self) -> Reg<FlexioTrig2, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig3(self) -> Reg<FlexioTrig3, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig4(self) -> Reg<FlexioTrig4, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig5(self) -> Reg<FlexioTrig5, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig6(self) -> Reg<FlexioTrig6, RW>

FlexIO Trigger Input Connections.

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pub const fn flexio_trig7(self) -> Reg<FlexioTrig7, RW>

FlexIO Trigger Input Connections.

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pub const fn dma0_req_enable0(self) -> Reg<Dma0ReqEnable0, RW>

DMA0 Request Enable0.

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pub const fn dma0_req_enable0_set(self) -> Reg<Dma0ReqEnable0Set, W>

DMA0 Request Enable0.

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pub const fn dma0_req_enable0_clr(self) -> Reg<Dma0ReqEnable0Clr, W>

DMA0 Request Enable0.

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pub const fn dma0_req_enable0_tog(self) -> Reg<Dma0ReqEnable0Tog, W>

DMA0 Request Enable0.

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pub const fn dma0_req_enable1(self) -> Reg<Dma0ReqEnable1, RW>

DMA0 Request Enable1.

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pub const fn dma0_req_enable1_set(self) -> Reg<Dma0ReqEnable1Set, W>

DMA0 Request Enable1.

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pub const fn dma0_req_enable1_clr(self) -> Reg<Dma0ReqEnable1Clr, W>

DMA0 Request Enable1.

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pub const fn dma0_req_enable1_tog(self) -> Reg<Dma0ReqEnable1Tog, W>

DMA0 Request Enable1.

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pub const fn dma0_req_enable2(self) -> Reg<Dma0ReqEnable2, RW>

DMA0 Request Enable2.

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pub const fn dma0_req_enable2_set(self) -> Reg<Dma0ReqEnable2Set, W>

DMA0 Request Enable2.

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pub const fn dma0_req_enable2_clr(self) -> Reg<Dma0ReqEnable2Clr, W>

DMA0 Request Enable2.

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pub const fn dma0_req_enable2_tog(self) -> Reg<Dma0ReqEnable2Tog, W>

DMA0 Request Enable2.

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pub const fn dma0_req_enable3(self) -> Reg<Dma0ReqEnable3, RW>

DMA0 Request Enable3.

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pub const fn dma0_req_enable3_set(self) -> Reg<Dma0ReqEnable3Set, W>

DMA0 Request Enable3.

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pub const fn dma0_req_enable3_clr(self) -> Reg<Dma0ReqEnable3Clr, W>

DMA0 Request Enable3.

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pub const fn dma1_req_enable0(self) -> Reg<Dma1ReqEnable0, RW>

DMA1 Request Enable0.

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pub const fn dma1_req_enable0_set(self) -> Reg<Dma1ReqEnable0Set, W>

DMA1 Request Enable0.

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pub const fn dma1_req_enable0_clr(self) -> Reg<Dma1ReqEnable0Clr, W>

DMA1 Request Enable0.

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pub const fn dma1_req_enable0_tog(self) -> Reg<Dma1ReqEnable0Tog, W>

DMA1 Request Enable0.

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pub const fn dma1_req_enable1(self) -> Reg<Dma1ReqEnable1, RW>

DMA1 Request Enable1.

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pub const fn dma1_req_enable1_set(self) -> Reg<Dma1ReqEnable1Set, W>

DMA1 Request Enable1.

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pub const fn dma1_req_enable1_clr(self) -> Reg<Dma1ReqEnable1Clr, W>

DMA1 Request Enable1.

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pub const fn dma1_req_enable1_tog(self) -> Reg<Dma1ReqEnable1Tog, W>

DMA1 Request Enable1.

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pub const fn dma1_req_enable2(self) -> Reg<Dma1ReqEnable2, RW>

DMA1 Request Enable2.

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pub const fn dma1_req_enable2_set(self) -> Reg<Dma1ReqEnable2Set, W>

DMA1 Request Enable2.

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pub const fn dma1_req_enable2_clr(self) -> Reg<Dma1ReqEnable2Clr, W>

DMA1 Request Enable2.

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pub const fn dma1_req_enable2_tog(self) -> Reg<Dma1ReqEnable2Tog, W>

DMA1 Request Enable2.

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pub const fn dma1_req_enable3(self) -> Reg<Dma1ReqEnable3, RW>

DMA1 Request Enable3.

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pub const fn dma1_req_enable3_set(self) -> Reg<Dma1ReqEnable3Set, W>

DMA1 Request Enable3.

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pub const fn dma1_req_enable3_clr(self) -> Reg<Dma1ReqEnable3Clr, W>

DMA1 Request Enable3.

Trait Implementations§

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impl Clone for Inputmux0

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fn clone(&self) -> Inputmux0

Returns a duplicate of the value. Read more
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fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
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impl PartialEq for Inputmux0

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fn eq(&self, other: &Inputmux0) -> bool

Tests for self and other values to be equal, and is used by ==.
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fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.
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impl Copy for Inputmux0

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impl Eq for Inputmux0

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impl Send for Inputmux0

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impl StructuralPartialEq for Inputmux0

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impl Sync for Inputmux0

Auto Trait Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> CloneToUninit for T
where T: Clone,

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unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.